ADV7181C

Rev. 0 | Page 9 of 20

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49

47

46

45

NC

42

CML

43

AGND

44

CAPC2

48

41

REFOUT

40

AVDD

39

CAPY2

37

AGND

36

35

34

FB

33

NC

38

CAPY1

2

HS/CS

3

DGND

4

DVDDIO

7

P13

6

P14

5

P15

1

INT

8

P12

9

SFL/SYNC_OUT

10

DGND

12

P11

13

P10

14

P9

15

P8

16

P7

11

DVDDIO

17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

PIN 1

ADV7181C

TOP VIEW

(Not to Scale)

NOTES

1. NC = NO CONNECT.

2. THE LFCSP_VQ HAS AN EXPOSED PADDLE THAT MUST BE CONNECTED TO GND.

Figure 2. Pin Configuration

Table 7. Pin Function Descriptions

Pin No.

Mnemonic

Type1

Description

3, 10, 24, 57

DGND

G

Digital Ground.

32, 37, 43

AGND

G

Analog Ground.

4, 11

DVDDIO

P

Digital I/O Supply Voltage (3.3 V).

23, 58

DVDD

P

Digital Core Supply Voltage (1.8 V).

40

AVDD

P

Analog Supply Voltage (3.3 V).

31

PVDD

P

PLL Supply Voltage (1.8 V).

34

FB

I

Fast Switch Overlay Input. This pin switches between CVBS and RGB analog signals.

35, 36, 46, 47, 48, 49

I

Analog Video Input Channels.

28 to 25, 19 to 12,

8 to 5, 62 to 59

P0 to P19

O

Video Pixel Output Port. Refer to Table 10 for output configuration modes.

1

INT

O

Interrupt. This pin can be active low or active high. When SDP/CP status bits

change, this pin is triggered. The set of events that triggers an interrupt is

under user control.

2

HS/CS

O

HS: Horizontal Synchronization Output Signal (SDP and CP Modes).

CS: Digital Composite Synchronization Signal (CP Mode).

64

VS

O

Vertical Synchronization Output Signal (SDP and CP Modes).

63

FIELD/DE

O

Field Synchronization Output Signal (All Interlaced Video Modes). This pin also

can be enabled as an data enable signal (DE) in CP mode to allow direct

connection to a HDMI/DVI Tx IC.

53

SDATA

I/O

54

SCLK

I

52

ALSB

I

ports. ALSB set to Logic 0 sets the address for a write to Control Port 0x40 and

the readback address for VBI Port 0x21. ALSB set to a Logic 1 sets the address

for a write to Control Port 0x42 and the readback address for VBI Port 0x23.