7

AT88RF020

2010C–RFID–2/06

Data Transfer

Commands

The following commands are supported for data transfer when the chip is in the ACTIVE

state (see ISO 14443-3, section 7.4.7). If the command is properly received (CRC cor-

rect, legal opcode and address, etc.), the chip will respond either with a NACK

command, an ACK command or data. Otherwise, the chip will silently wait for a proper

command. The chip supports additional commands as part of the anticollision sequenc-

ing; these commands are documented elsewhere in this data sheet. On-chip password

checking is required for most operations. The coding of these commands is described in

Table 3 and Table 4 on page 9.

Below is a description of the individual commands supported.

READ Command

The addressed 64-bit page referenced in the READ command is returned to the PCD.

The PICC will respond with the data if the address is correct, the page is readable and

the password has been sent; otherwise, it will respond with a NACK. Password checking

is not required to read Pages 0, 1 and 2, but all other pages require a previously exe-

cuted valid password check to read the chip. There is no byte read capability. Page 3

(the actual password) can never be read directly and is only accessed internally during

the PASSWORD command. The chip will NACK any attempt to read Page 3.

WRITE Command

The 64-bit memory page referenced in the WRITE command is written with the data that

follows the command byte. The chip ignores the upper 3 bits of the byte-wide memory

address and the lower five bits from the memory address.

If the target page cannot be written to because the page is read only or is locked, or if

the chip has not been properly opened to access with a valid password, then a NACK

command will be issued by the PICC. Otherwise, an ACK command will be transmitted

after the memory write operation has been completed.

Reader/writer modulation is prohibited during the memory write time, which is the time

period between the PCD’s EOF and the issuance of the PICC’s ACK command. This

period is less than 3 ms and is considered to be an extended TR0 wait interval, as per

ISO 14443.

Memory is never modified if a NACK command is issued. Pages 0 and 2 (PUPI, Lock-

Bits, Signature and Counter) cannot be written with this command. Addressing either

Page 0 or Page 2 within the WRITE command will result in a NACK command being

issued by the device.

LOCK Command

The LOCK command can be executed only after proper password validation has been

performed. The LOCK command locks the addressed memory location from future

changes. The memory location can still be read with proper password validation. The

last 31 bits of data within the LOCK command are logically ORed within the device with

the 31-bit value stored within the LockBits field of Page 0 (see Memory Map, Table 1 on

page 2). The result is then written back into the memory. After the memory has been

written, an ACK command will be transmitted. A NACK command is issued if the LOCK

command is attempted without previous password validation.

If power is interrupted during this write, all bits within LockBits may be set to “1”, and the

chip may be disabled. The first 33 bits of data sent within the command to the PICC are

ignored.

The bits within the LockBits field correspond to the pages within the memory and, if set

to “1”, prevent all future writes to the corresponding page; i.e., LockBits field bit 6 locks

Page 6 when it is set to a “1”. There is no mechanism to ever “unlock” a page, so once a

page is locked, it can never be unlocked and, as such, can never be modified. The 31-

bit LockBits field is set to all “0”s upon shipment from the factory. Bit 0 of the LockBits