IGLOO PLUS Low-Power Flash FPGAs

v1.3

1 - 5

entering/exiting Flash*Freeze mode. It is also possible to use the Flash*Freeze pin as a regular I/O if

Flash*Freeze mode usage is not planned.

VersaTiles

core tiles. The IGLOO PLUS VersaTile supports the following:

•

All 3-input logic functions—LUT-3 equivalent

•

Latch with clear or set

•

D-flip-flop with clear or set

•

Enable D-flip-flop with clear or set

Refer to Figure 1-3 for VersaTile configurations.

User Nonvolatile FlashROM

Actel IGLOO PLUS devices have 1 kbit of on-chip, user-accessible, nonvolatile FlashROM. The

FlashROM can be used in diverse system applications:

•

Internet protocol addressing (wireless or fixed)

•

System calibration settings

•

Device serialization and/or inventory control

•

Subscription-based business models (for example, set-top boxes)

•

Secure key storage for secure communications algorithms

•

Asset management/tracking

•

Date stamping

•

Version management

The FlashROM is written using the standard IGLOO PLUS IEEE 1532 JTAG programming interface.

The core can be individually programmed (erased and written), and on-chip AES decryption can be

used selectively to securely load data over public networks (except in AGLP030 devices), as in

security keys stored in the FlashROM for a user design.

Figure 1-2 • IGLOO PLUS Flash*Freeze Mode

Actel

IGLOO PLUS

FPGA

Flash*Freeze

Mode Control

Flash*Freeze Pin

Figure 1-3 • VersaTile Configurations

X1

Y

X2

X3

LUT-3

Data

Y

CLK

Enable

CLR

D-FF

Data

Y

CLK

CLR

D-FF

LUT-3 Equivalent

D-Flip-Flop with Clear or Set

Enable D-Flip-Flop with Clear or Set