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AX2000-1CS896I Datasheet(PDF) 82 Page - Actel Corporation

Part # AX2000-1CS896I
Description  Axcelerator Family FPGAs
PDF  226 Pages
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Manufacturer  ACTEL [Actel Corporation]
Direct Link  http://www.actel.com
Logo ACTEL - Actel Corporation

AX2000-1CS896I Datasheet(HTML) 82 Page - Actel Corporation

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Axcelerator Family FPGAs
2- 68
v2.7
User Flow
There are two methods of including a PLL in a design:
•
The recommended method of using a PLL is to
create custom PLL blocks using Actel's macro
generator, SmartGen, that can be instantiated in a
design.
•
The alternative method is to instantiate one of the
generic library primitives (PLL or PLLFB) into either
a schematic or HDL netlist, using inverters for
polarity control and tying all unused address and
data bits to ground.
Timing Model
Note: tPCLK is the delay in the clock signal
Figure 2-52 • PLL Model
CLK
CLK1
Lock
CLK2
63
5
6
FB
tPCLK*



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