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LTM8023MPV Datasheet(PDF) 3 Page - Linear Technology |
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LTM8023MPV Datasheet(HTML) 3 Page - Linear Technology |
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3 / 20 page ![]() LTM8023 3 8023fb The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 10V, VRUN/SS = 10V, VBIAS = 3V, RT = 60.4k, COUT = 4.7μF unless otherwise specified. ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTM8023E is guaranteed to meet performance specifications from 0°C to 85°C ambient. Specifications over the full –40°C to 85°C ambient operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTM8023I is guaranteed to meet specifications over the full –40°C to 85°C ambient operating temperature range. The LTM8023MP is guaranteed to meet specifications over the full –55°C to 125°C temperature range. Note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIN Input DC Voltage l 3.6 36 V VOUT Output DC Voltage 0A < IOUT ≤ 2A, RADJ Open, COUT = 51μF (Note 3) 0A < IOUT ≤ 2A, RADJ = 43.2k, COUT = 51μF (Note 3) 0.8 10 V V RADJ(MIN) Minimum Allowable RADJ (Note 4) 42.2 kΩ IOUT Continuous Output DC Current 4 ≤ VIN ≤ 36, COUT = 51μF 0 2 A IQVIN VIN Quiescent Current VRUN/SS = 0.2V, RT = 174k VBIAS = 3V, Not Switching, RT = 174k (E, I) VBIAS = 3V, Not Switching, RT = 174k (MP) VBIAS = 0V, Not Switching, RT = 174k l l 0.1 25 25 85 0.5 60 350 120 μA μA μA μA IQBIAS BIAS Quiescent Current VRUN/SS = 0.2V, RT = 174k VBIAS = 3V, Not Switching, RT = 174k (E, I) VBIAS = 3V, Not Switching, RT = 174k (MP) VBIAS = 0V, Not Switching, RT = 174k l l 0.03 50 50 1 0.5 120 200 5 μA μA μA μA ΔVOUT/VOUT Line Regulation 5 ≤ VIN ≤ 36, IOUT = 1A, VOUT = 3.3V, COUT = 51μF 0.1 % ΔVOUT/VOUT Load Regulation VIN = 24V, 0 ≤ IOUT ≤ 2A, VOUT = 3.3V, COUT = 51μF 0.4 % VOUT(AC_RMS) Output Ripple (RMS) VIN = 24V, IOUT = 2A, VOUT = 3.3V, COUT = 51μF 10 mV fSW Switching Frequency RT = 113k, COUT = 51μF 325 kHz ISC(OUT) Output Short Circuit Current VIN = 36V, VOUT = 0V 2.9 A VADJ Voltage at ADJ Pin COUT = 51μF l 765 790 805 mV VBIAS(MIN) Minimum BIAS Voltage for Proper Operation 2.3 2.8 V IADJ Current Out of ADJ Pin ADJ = 1V, COUT = 51μF 2 μA IRUN/SS RUN/SS Pin Current VRUN/SS = 2.5V 5 10 μA VIH(RUN/SS) RUN/SS Input High Voltage COUT = 51μF 2.5 V VIL(RUN/SS) RUN/SS Input Low Voltage COUT = 51μF 0.2 V VPG(TH) PG Threshold VOUT Rising 730 mV IPGO PG Leakage VPG = 30V 0.1 1 μA IPGSINK PG Sink Current VPG = 0.4V 200 800 μA VSYNCIL SYNC Input Low Threshold fSYNC = 550kHz, COUT = 51μF 0.5 V VSYNCIH SYNC Input High Threshold fSYNC = 550kHz, COUT = 51μF 0.7 V ISYNCBIAS SYNC Pin Bias Current VSYNC = 0V 0.1 μA Note 3: COUT = 51μF is composed of a 4.7μF ceramic capacitor in parallel with a 47μF electrolytic. Note 4: Guaranteed by design. |
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