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LTC2452

2452fb

APPLICATIONS INFORMATION

Ease of Use

The LTC2452 data output has no latency, ﬁlter settling delay

or redundant results associated with the conversion cycle.

There is a one-to-one correspondence between the conver-

sion and the output data. Therefore, multiplexing multiple

analog input voltages requires no special actions.

The LTC2452 performs offset calibrations every conver-

sion. This calibration is transparent to the user and has no

effect upon the cyclic operation described previously. The

advantage of continuous calibration is stability of the ADC

performance with respect to time and temperature.

The LTC2452 includes a proprietary input sampling scheme

that reduces the average input current by several orders

of magnitude when compared to traditional delta-sigma

architectures. This allows external ﬁlter networks to in-

terface directly to the LTC2452. Since the average input

sampling current is 50nA, an external RC lowpass ﬁlter

using 1kΩ and 0.1μF results in <1LSB additional error.

Additionally, there is negligible leakage current between

IN+ and IN–.

Reference Voltage Range

The LTC2453 reference input range is 2.5V to VCC. For the

simplest operation, REF can be shorted to VCC.

Input Voltage Range

As mentioned in the Output Data Format section, the output

code is given as 32768•VIN/VREF + 32768. For VIN ≥ VREF,

the output code is clamped at 65535 (all ones). For VIN ≤

–VREF, the output code is clamped at 0 (all zeroes).

Figure 3. Output Code vs VIN+ with VIN– = 0

The LTC2452 includes a proprietary system that can,

typically, digitize each input 8LSB above VREF and below

GND, if the differential input is within ±VREF. As an ex-

ample (Figure 3), if the user desires to measure a signal

slightly below ground, the user could set VIN– = GND,

and VREF = 5V. If VIN+ = GND, the output code would be

approximately 32768. If VIN+ = GND – 8LSB = –1.22 mV,

the output code would be approximately 32760.

Output Data Format

The LTC2452 generates a 16-bit direct binary encoded

result. It is provided as a 16-bit serial stream through the

SDO output pin under the control of the SCK input pin

(see Figure 4).

Letting VIN = (VIN+ – VIN–), the output code is given

as 32768•VIN/VREF + 32768. The ﬁrst bit output by the

LTC2452, D15, is the MSB, which is 1 for VIN+ ≥ VIN– and

0 for VIN+ < VIN–. This bit is followed by successively less

signiﬁcant bits (D14, D13...) until the LSB is output by the

LTC2452. Table 1 shows some example output codes.

Table 1. LTC2452 Output Data Format

DIFFERENTIAL INPUT

VOLTAGE VIN+ – VIN–

D15

(MSB)

D14

D13

D12...D2

(LSB)

CORRESPONDING

DECIMAL VALUE

≥VREF

65535

VREF – 1LSB

65534

0.5•VREF

49152

0.5•VREF – 1LSB

49151

32768

–1LSB

32767

–0.5•VREF

16384

–0.5•VREF – 1LSB

16383

≤ –VREF

VIN

+/VREF+

–0.001

0.001

2452 F03

–4

–12

–8

–16

–20

–0.005

0.005

0.0015

SIGNALS

BELOW

GND

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