CD74ACT251M datasheet(6/8 Pages) TI

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Three-State Output

Capacitance

Input Capacitance

-10-

-10

Power Dissipation Capacitance

CPD

(Note 11)

NOTES:

8. Limits tested 100%.

9. 3.3V Min is at 3.6V, Max is at 3V.

10. 5V Min is at 5.5V, Max is at 4.5V.

11. CPD is used to determine the dynamic power consumption per device.

PD = VCC

2 f

i (CPD + CL) where fi = input frequency, CL = output load capacitance, VCC = supply voltage.

Switching Speciﬁcations Input tr, tf = 3ns, CL = 50pF (Worst Case) (Continued)

PARAMETER

SYMBOL

VCC (V)

-40oC TO 85oC

-55oC TO 125oC

UNITS

MIN

TYP

MAX

MIN

TYP

MAX

FIGURE 1. THREE-STATE PROPAGATION DELAY WAVEFORMS AND TEST CIRCUIT

FIGURE 2. PROPAGATION DELAY TIMES

DUT

WITH

THREE-

STATE

OUTPUT

INPUT LEVEL

90%

10%

GND

tf = 3ns

tPZL

tPZH

tPLZ

tPHZ

OUTPUTS

ENABLED

OUTPUTS

DISABLED

OUTPUT: LOW

TO OFF TO LOW

OUTPUT: HIGH

TO OFF TO HIGH

OTHER

INPUTS

(TIED HIGH

OR LOW)

OUTPUT

DISABLE

50pF

500

Ω†

500

Ω†

OUT

0.2VCC

VOL (≠ GND)

VOH (≠ VCC)

0.8 VCC

GND (tPHZ, tPZH)

OUTPUTS

ENABLED

OPEN (tPHL, tPLH)

2 VCC (tPLZ, tPZL)

(OPEN DRAIN)

tr = 3ns

OUTPUT

DISABLE

†FOR AC SERIES ONLY: WHEN VCC = 1.5V, RL = 1kΩ

INPUT LEVEL

tr = 3ns

tf = 3ns

90%

10%

tPHL

tPLH

INVERTING

OUTPUT Y

NON-INVERTING

OUTPUT Y

tPLH

CD74AC251, CD74ACT251

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