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CD54HC273F Datasheet(PDF) 1 Page - Texas Instruments |
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CD54HC273F Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 8 page ![]() 1 Data sheet acquired from Harris Semiconductor SCHS174 Features • Common Clock and Asynchronous Master Reset • Positive Edge Triggering • Buffered Inputs • Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25 oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH Description The Harris CD74HC273 and CD74HCT273 high speed octal D-Type flip-flops with a direct clear input are manufactured with silicon-gate CMOS technology. They possess the low power consumption of standard CMOS integrated circuits. Information at the D inputis transferred to the Q outputs on the positive-going edge of the clock pulse. All eight flip-flops are controlled by a common clock (CP) and a common reset (MR). Resetting is accomplished by a low voltage level independent of the clock. All eight Q outputs are reset to a logic 0. Pinout CD54HC273, CD54HCT273, CD74HC273, CD74HCT273 (PDIP, SOIC, CERDIP) TOP VIEW Ordering Information PART NUMBER TEMP. RANGE (oC) PACKAGE PKG. NO. CD54HC273F -55 to 125 20 Ld CERDIP F20.3 CD54HCT273F -55 to 125 20 Ld CERDIP F20.3 CD74HC273E -55 to 125 20 Ld PDIP E20.3 CD74HCT273E -55 to 125 20 Ld PDIP E20.3 CD74HC273M -55 to 125 20 Ld SOIC M20.3 CD74HCT273M -55 to 125 20 Ld SOIC M20.3 NOTES: 1. When ordering, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel. 2. Wafer and die for this part number is available which meets all electrical specifications. Please contact your local sales office or Harris customer service for ordering information. 11 12 13 14 15 16 17 18 20 19 10 9 8 7 6 5 4 3 2 1 MR Q0 D0 D1 Q1 Q2 D3 D2 Q3 GND VCC D7 D6 Q6 Q7 Q5 D5 D4 Q4 CP February 1998 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © Harris Corporation 1998 CD74HC273, CD74HCT273 High Speed CMOS Logic Octal D-Type Flip-Flop with Reset File Number 1479.2 [ /Title (CD74 HC273 , CD74 HCT27 3) /Sub- ject (High Speed CMOS Logic Octal D- Type Flip- |
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