CD54HC688 datasheet(6/7 Pages) TI

6 / 7 page

E to Output

tPLH,

tPHL

CL = 50pF

120

150

180

4.5

CL =15pF

CL = 50pF

Output Transition Time

(Figure 1)

tTLH,tTHL CL = 50pF

110

4.5

Input Capacitance

CIN

CL = 50pF

Power Dissipation Capacitance

(Notes 4, 5)

CPD

CL =15pF

HCT TYPES

Propagation Delay (Figure 1)

tPLH,

tPHL

CL = 50pF

4.5

An to Output

CL =15pF

Bn to Output

tPLH,

tPHL

CL = 50pF

4.5

CL =15pF

E to Output

tPLH,

tPHL

CL = 50pF

4.5

CL =15pF

Output Transition Time

(Figure 1)

tTLH,tTHL CL = 50pF

4.5

Input Capacitance

CIN

CL = 50pF

Power Dissipation Capacitance

(Notes 4, 5)

CPD

CL =15pF

NOTES:

4. CPD is used to determine the dynamic power consumption, per gate.

5. PD = VCC

2 f

i (CPD + CL) where fi = Input Frequency, CL = Output Load Capacitance, VCC = Supply Voltage.

Switching Speciﬁcations Input tr, tf = 6ns (Continued)

PARAMETER

SYMBOL

TEST

CONDITIONS

VCC

(V)

25oC

-40oC TO 85oC -55oC TO 125oC

UNITS

MIN

TYP

MAX

MIN

MAX

MIN

MAX

Test Circuit and Waveform

FIGURE 1. PROPAGATION DELAY AMD TRANSITION TIMES

tr = 6ns

OUTPUT Y

tf = 6ns

90%

10%

tTLH

ANY INPUT

A OR B

INPUT LEVEL

GND

tPLH

tPHL

tTHL

CD74HC688, CD74HCT688

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