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PKS606Y/F Datasheet(PDF) 3 Page - FERYSTER Inductive Components Manufacturer |
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PKS606Y/F Datasheet(HTML) 3 Page - FERYSTER Inductive Components Manufacturer |
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3 / 24 page ![]() PKS603-607 Rev. I 02/07 3 Figure 4. Frequency Jitter. PeakSwitch Functional Description PeakSwitch integratesa700VpowerMOSFETswitchwitha powersupplycontrolleronthesamedie.Unlikeconventional pulsewidthmodulation(PWM)controllers,PeakSwitchusesa simpleON/OFFcontroltoregulatetheoutputvoltage. The controller consists of an oscillator, enable circuit (sense and logic), current-limit state machine, 5.8 V regulator, BYPASS pin under-voltage circuit, over- temperature protection, current limit circuit, and leading edgeblanking.PeakSwitchincorporatesadditionalcircuitry for adaptive current limit, line under-voltage sense, programmable smart line sense, auto-restart, adaptive switching cycle on-time extension, and frequency jitter. Figure2isafunctionalblockdiagramofthedevice’smost importantfeatures. Oscillator Thetypicaloscillatorfrequencyisinternallysettoanaverage of277kHz.Twosignalsaregeneratedfromtheoscillator:the maximumdutycycle(DC MAX)signalandtheclocksignalthat indicatesthebeginningofeachcycle. Theoscillatorincorporatescircuitrythatintroducesasmall amountoffrequencyjitter,typically16kHzpeak-to-peak,to minimizeEMIemission.Themodulationrateofthefrequency jitterissetto1.1kHztooptimizeEMIreductionforboth averageandquasi-peakemissions.Thefrequencyjittershould bemeasuredwiththeoscilloscopetriggeredatthefallingedge oftheDRAINwaveform.ThewaveforminFigure4illustrates thefrequencyjitter. Enable Input and Current-Limit State Machine TheenableinputcircuitattheEN/UVpinconsistsofalow impedancesourcefolloweroutputsetat1.0V.Thecurrent throughthesourcefollowerislimitedto240µA.Whenthe current out of this pin exceeds 240µA, a low logic level (disable)isgeneratedattheoutputoftheenablecircuit.This enable circuit output is sampled at the beginning of each cycleontherisingedgeoftheclocksignal.Ifhigh,thepower MOSFETisturnedonforthatcycle(enabled).Iflow,thepower MOSFETremainsoff(disabled).Sincethesamplingisdone onlyatthebeginningofeachcycle,subsequentchangesinthe EN/UVpinvoltageorcurrentduringtheremainderofthe cycleareignored. Thecurrent-limitstatemachinereducesthecurrentlimitby discreteamountsatlightloadswhenPeakSwitchislikelyto switchintheaudiblefrequencyrange.Thelowercurrentlimit raisestheeffectiveswitchingfrequencyabovetheaudiorange andreducesthetransformerfluxdensity,includingtheassociated audible noise. The state machine monitors the sequence of EN/UVpinvoltagelevelstodeterminetheloadconditionand adjuststhecurrentlimitlevelaccordinglyindiscreteamounts. Undermostoperatingconditions(exceptwhenclosetono-load), thelowimpedanceofthesourcefollowerkeepsthevoltageon theEN/UVpinfromgoingmuchbelow1.0Vinthedisabled state.Thisimprovestheresponsetimeoftheoptocouplerthat isusuallyconnectedtothispin. 5.8 V Regulator and 6.3 V Shunt Voltage Clamp The5.8Vregulatorchargesthebypasscapacitorconnectedto theBYPASSpinto5.8Vbydrawingacurrentfromthevoltage ontheDRAINpinwhenevertheMOSFETisoff.TheBYPASS pinistheinternalsupplyvoltagenode.WhentheMOSFET ison,thePeakSwitch operatesfromtheenergystoredinthe bypasscapacitor.ThevoltageontheDRAINpinpowersthe bypassduringstart-up. Thereisa6.3VshuntregulatorclampingtheBYPASSpinat 6.3Vwhencurrentisprovidedthroughanexternalresistor from the bias winding in normal operation. Powering the PeakSwitch deviceinthiswayminimizesno-loadconsumption toabout150mWat265VAC.Notethatabiaswindingmustbe usedtopowerthedevice.SeeKeyApplicationConsiderations sectionfordetails. BYPASS Pin Under-Voltage TheBYPASSpinunder-voltagecircuitrydisablesthepower MOSFETwhentheBYPASSpinvoltagedropsbelow4.8V. OncetheBYPASSpinvoltagedropsbelow4.8V,itmustrise backto5.8Vtoenable(turnon)thepowerMOSFET. Over Temperature Protection Thethermalshutdowncircuitrysensesthedietemperature. Thethresholdistypicallysetat142°Cwith75°Chysteresis. When the die temperature rises above this threshold, the powerMOSFETisdisabledandremainsdisableduntilthedie temperaturefallsby75°C,atwhichpointitisre-enabled.Alarge 600 0 2.5 5 285 kHz 269 kHz VDRAIN Time ( µs) 500 400 300 200 100 0 |
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