SN54ACT574, SN74ACT574

OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCAS537C – OCTOBER 1995 – REVISED JANUARY 2000

3

POST OFFICE BOX 655303

recommended operating conditions (see Note 3)

SN54ACT574

SN74ACT574

UNIT

MIN

MAX

MIN

MAX

UNIT

VCC

Supply voltage

4.5

5.5

4.5

5.5

V

VIH

High-level input voltage

2

2

V

VIL

Low-level input voltage

0.8

0.8

V

VI

Input voltage

0

VCC

0

VCC

V

VO

Output voltage

0

VCC

0

VCC

V

IOH

High-level output current

–24

–24

mA

IOL

Low-level output current

24

24

mA

∆t/∆v

Input transition rise or fall rate

0

8

0

8

ns/V

TA

Operating free-air temperature

–55

125

–40

85

°C

NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

VCC

TA = 25°C

SN54ACT574

SN74ACT574

UNIT

PARAMETER

TEST CONDITIONS

VCC

MIN

TYP

MAX

MIN

MAX

MIN

MAX

UNIT

IOH =50 µA

4.5 V

4.4

4.49

4.4

4.4

IOH = –50 µA

5.5 V

5.4

5.49

5.4

5.4

VOH

IOH =24 mA

4.5 V

3.86

3.7

3.76

V

VOH

IOH = –24 mA

5.5 V

4.86

4.7

4.76

V

IOH = –50 mA†

5.5 V

3.85

IOH = –75 mA†

5.5 V

3.85

IOL =50 µA

4.5 V

0.1

0.1

0.1

IOL = 50 µA

5.5 V

0.1

0.1

0.1

VOL

IOL =24mA

4.5 V

0.36

0.44

0.44

V

VOL

IOL = 24 mA

5.5 V

0.36

0.44

0.44

V

IOL = 50 mA†

5.5 V

1.65

IOL = 75 mA†

5.5 V

1.65

IOZ

VO = VCC or GND

5.5 V

±0.25

±5

±2.5

µA

II

VI = VCC or GND

5.5 V

±0.1

±1

±1

µA

ICC

VI = VCC or GND,

IO = 0

5.5 V

4

80

40

µA

∆ICC‡

One input at 3.4 V,

Other inputs at GND or VCC

5.5 V

0.6

1.5

1.5

mA

Ci

VI = VCC or GND

5 V

4.5

pF

† Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms.

‡ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.

(unless otherwise noted) (see Figure 1)

TA = 25°C

SN54ACT574

SN74ACT574

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

UNIT

tw

Pulse duration, CLK high or low

3

5

4

ns

tsu

Setup time, data before CLK

↑

2.5

3.5

2.5

ns

th

Hold time, data after CLK

↑

1

2

1

ns

PRODUCT PREVIEW information concerns products in the formative or

design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right to

change or discontinue these products without notice.