SN54ALVTH162244, SN74ALVTH162244

2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCES074E – JUNE 1996 - REVISED JANUARY 1999

3

POST OFFICE BOX 655303

–0.5 V to 4.6 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–0.5 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range applied to any output in the high-impedance

–0.5 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–0.5 V to 7 V

. . . . . . . . . . . . . . . . . . . .

30 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–30 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance,

89

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DGV package

93

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DL package

94

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65

°C to 150°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51.

SN54ALVTH162244

SN74ALVTH162244

UNIT

MIN

TYP

MAX

MIN

TYP

MAX

UNIT

VCC

Supply voltage

2.3

2.7

2.3

2.7

V

VIH

High-level input voltage

1.7

1.7

V

VIL

Low-level input voltage

0.7

0.7

V

VI

Input voltage

0

VCC

5.5

0

VCC

5.5

V

IOH

High-level output current

–6

–8

mA

IOL

Low-level output current

8

12

mA

∆t/∆v

Input transition rise or fall rate

Outputs enabled

10

10

ns/V

∆t/∆VCC

Power-up ramp rate

200

200

µs/V

TA

Operating free-air temperature

–55

125

–40

85

°C

NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

SN54ALVTH162244

SN74ALVTH162244

UNIT

MIN

TYP

MAX

MIN

TYP

MAX

UNIT

VCC

Supply voltage

3

3.6

3

3.6

V

VIH

High-level input voltage

2

2

V

VIL

Low-level input voltage

0.8

0.8

V

VI

Input voltage

0

VCC

5.5

0

VCC

5.5

V

IOH

High-level output current

–8

–12

mA

IOL

Low-level output current

8

12

mA

∆t/∆v

Input transition rise or fall rate

Outputs enabled

10

10

ns/V

∆t/∆VCC

Power-up ramp rate

200

200

µs/V

TA

Operating free-air temperature

–55

125

–40

85

°C

NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

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design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right to

change or discontinue these products without notice.