SN54F175, SN74F175

QUADRUPLE D-TYPE FLIP-FLOPS

WITH CLEAR

SDFS058A – D2932, MARCH 1987 – REVISED OCTOBER 1993

2–4

POST OFFICE BOX 655303

timing requirements over recommended ranges of supply voltage and operating free-air

temperature (unless otherwise noted)

VCC = 5 V,

TA = 25°C

SN54F175

SN74F175

UNIT

′F175

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

fclock

Clock frequency

0

100

0

100

0

100

MHz

CLK high

4

4

4

tw

Pulse duration

CLK low

5

5

5

ns

CLR low

5

5

5

t

Setup time, data before CLK

↑

High or low

3

3

3

ns

tsu

Setup time, inactive state, data before CLK

↑†

CLR high

5

5

5

ns

th

Hold time, data after CLK

↑

High or low

1

1

1

ns

† Inactive-state setup time is also referred to as recovery time.

switching characteristics (see Note 3)

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC = 5 V,

CL = 50 pF,

RL = 500 Ω,

TA = 25°C

VCC = 4.5 V to 5.5 V,

CL = 50 pF,

RL = 500 Ω,

TA = MIN to MAX‡

UNIT

(INPUT)

(OUTPUT)

′F175

SN54F175

SN74F175

MIN

TYP

MAX

MIN

MAX

MIN

MAX

fmax

100

140

100

100

MHz

tPLH

CLK

QorQ

3.2

4.6

6.5

2.7

8.5

3.2

7.5

ns

tPHL

CLK

Q or Q

3.2

6.1

8.5

3.2

10.5

3.2

9.5

ns

tPLH

CLR

Q

3.2

6.1

8.5

3.2

10

3.2

9

ns

tPHL

CLR

Q

3.7

8.6

11.5

3.7

15

3.7

13

ns

‡ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

NOTE 3: Load circuits and waveforms are shown in Section 1.