SN54LVC646A, SN74LVC646A

OCTAL BUS TRANSCEIVERS AND REGISTERS

WITH 3-STATE OUTPUTS

SCAS302G – JANUARY 1993 – REVISED JUNE1998

1

POST OFFICE BOX 655303

CMOS) Submicron Process

Live Insertion

All Ports (5-V Input/Output Voltage With

MIL-STD-833, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

JESD 17

Small-Outline (DW), Shrink Small-Outline

(DB), Thin Shrink Small-Outline (PW)

Packages, and Ceramic Chip Carriers (FK)

description

The SN54LVC646A octal bus transceiver and

operation and the SN74LVC646A octal bus

transceiver and register is designed for 1.65-V to

These devices consist of bus-transceiver circuits,

D-type flip-flops, and control circuitry arranged for

multiplexed transmission of data directly from the

input bus or from the internal registers. Data on

the A or B bus is clocked into the registers on the

low-to-high transition of the appropriate clock

(CLKAB or CLKBA) input. Figure 1 illustrates the

four fundamental bus-management functions that

are performed with the ’LVC646A.

Output-enable (OE) and direction-control (DIR) inputs control the transceiver functions. In the transceiver

mode, data present at the high-impedance port is stored in either register or in both.

The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR

determines which bus receives data when OE is low. In the isolation mode (OE high), A data is stored in one

register and B data can be stored in the other register.

When an output function is disabled, the input function is still enabled and can be used to store and transmit

data. Only one of the two buses, A or B, can be driven at a time.

Copyright

© 1998, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

SN74LVC646A . . . DB, DW, OR PW PACKAGE

(TOP VIEW)

CLKAB

SAB

DIR

A1

A2

A3

A4

A5

A6

A7

A8

GND

CLKBA

SBA

OE

B1

B2

B3

B4

B5

B6

B7

B8

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

5

6

7

8

9

10

11

25

24

23

22

21

20

19

43

2 1 28

12 13 14 15 16

OE

B1

B2

NC

B3

B4

B5

A1

A2

A3

NC

A4

A5

A6

SN54LVC646A . . . FK PACKAGE

(TOP VIEW)

17 18

27 26

NC – No internal connection

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.