SN65LVDT2

HIGH-SPEED DIFFERENTIAL LINE RECEIVER

SLLS374B – JULY 1999 – REVISED JANUARY 2000

4

POST OFFICE BOX 655303

otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP†

MAX

UNIT

VITH+

Positive-going differential input voltage threshold

See Figure 2 and Table 1

100

mV

VITH–

Negative-going differential input voltage threshold

See Figure 2 and Table 1

–100

mV

VOH

High-level output voltage

IOH = –8 mA

2.4

3

V

VOL

Low-level output voltage

IOL = 8 mA

0.25

0.4

V

ICC

Supply current

No load,

Steady state

5

8

mA

II

Input current (A or B inputs)

VI = 0 V,

Other input open

±40

µA

II

Input current (A or B inputs)

VI = 2.4 V,

Other input open

–2.4

µA

IID

Differential input current (IIA – IIB)

VIA = 0.4 V, VIB = 0 V

VIA = 2.4 V, VIB = 2 V

3

3.6

4.4

mA

II(OFF)

Power-off input current (A or B inputs)

VCC = 0 V,

VI = 2.4 V,

Other input open

40

µA

† All typical values are at 25

°C and with a 3.3-V supply.

(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP†

MAX

UNIT

tPLH

Propagation delay time, low-to-high-level output

1.4

2.6

3.1

ns

tPHL

Propagation delay time, high-to-low-level output

C10 F

1.4

2.5

3.1

ns

tsk(p)

Pulse skew (|tpHL – tpLH|)‡

CL = 10 pF,

See Figure 3

0.1

0.5

ns

tr

Output signal rise time

See Figure 3

0.7

1.1

ns

tf

Output signal fall time

0.7

1.1

ns

† All typical values are at 25

°C and with a 3.3-V.

‡ tsk(p) is the magnitude of the time difference between the high-to-low and low-to-high propagation delay times at an output.