SN74ALS232B

16

× 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY

SCAS251B – FEBRUARY 1989 – REVISED APRIL 1998

1

POST OFFICE BOX 655303

Outputs

Small-Outline Package (DW), Plastic Chip

Carriers (FN), and Standard Plastic 300-mil

DIPs (N)

description

This 64-bit memory features high speed and fast

fall-through times. It is organized as 16 words by

4 bits.

A first-in, first-out (FIFO) memory is a storage

device that allows data to be written into and read

from its array at independent data rates. This

FIFO is designed to process data at rates up to

40 MHz in a bit-parallel format, word by word.

Data is written into memory on a low-to-high

transition at the load-clock (LDCK) input and is

read out on a low-to-high transition at the

unload-clock (UNCK) input. The memory is full

when the number of words clocked in exceeds by

16 the number of words clocked out. When the

memory is full, LDCK signals have no effect on the

data residing in memory. When the memory is

empty, UNCK signals have no effect.

Status of the FIFO memory is monitored by the FULL and EMPTY output flags. The FULL output is low when

the memory is full and high when it is not full. The EMPTY output is low when the memory is empty and high

when it is not empty.

A low level on the reset (RST) input resets the internal stack-control pointers and also sets EMPTY low and sets

FULL high. The Q outputs are not reset to any specific logic level. The first low-to-high transition on LDCK, after

either a RST pulse or from an empty condition, causes EMPTY to go high and the data to appear on the

Q outputs. It is important to note that the first word does not have to be unloaded. Data outputs are noninverting

with respect to the data inputs and are at high impedance when the output-enable (OE) input is low. OE does

not affect the FULL or EMPTY output flags. Cascading is easily accomplished in the word-width direction but

is not possible in the word-depth direction.

The SN74ALS232B is characterized for operation from 0

°C to 70°C.

Copyright

© 1998, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

OE

FULL

LDCK

D0

D1

D2

D3

GND

DW OR N PACKAGE

(TOP VIEW)

3 2 1 20 19

910 11 12 13

4

5

6

7

8

18

17

16

15

14

EMPTY

Q0

NC

Q1

Q2

LDCK

D0

NC

D1

D2

FN PACKAGE

(TOP VIEW)

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

UNCK

EMPTY

Q0

Q1

Q2

Q3

RST

NC – No internal connection

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.