SN74ALVC7806

256

× 18

LOW-POWER FIRST-IN, FIRST-OUT MEMORY

SCAS591A – OCTOBER 1997 – REVISED APRIL 1998

7

POST OFFICE BOX 655303

timing requirements over recommended operating conditions (see Figures 1 through 3)

’ALVC7806-25

’ALVC7806-40

UNIT

MIN

MAX

MIN

MAX

UNIT

fclock

Clock frequency

40

25

MHz

D0–D17 high or low

8

12

LDCK high or low

8

12

tw

Pulse duration

UNCK high or low

8

12

ns

PEN low

8

12

RESET low

10

12

D0–D17 before LDCK

↑

5

5

tsu

Setup time

LDCK inactive before RESET high

6

6

ns

PEN before LDCK

↑

8

8

D0–D17 after LDCK

↑

0

0

th

Hold time

PEN high after LDCK low

0

0

ns

th

Hold time

PEN low after LDCK

↑

3

3

ns

LDCK inactive after RESET high

6

6

switching characteristics over recommended ranges of supply voltage and operating free-air

PARAMETER

FROM

TO

’ALVC7806-25

’ALVC7806-40

UNIT

PARAMETER

(INPUT)

(OUTPUT)

MIN

MAX

MIN

MAX

UNIT

fmax

LDCK or UNCK

40

25

MHz

t d

LDCK

↑

Any Q

9

22

9

24

ns

tpd

UNCK

↑

Any Q

6

18

6

20

ns

tPLH

LDCK

↑

EMPTY

6

17

6

19

ns

UNCK

↑

EMPTY

6

17

6

19

tPHL

RESET low

EMPTY

4

18

4

20

ns

PHL

LDCK

↑

FULL

6

17

6

19

tPLH

UNCK

↑

FULL

6

17

6

19

ns

tPLH

RESET low

FULL

4

20

4

22

ns

t d

LDCK

↑

AF/AE

7

20

7

22

ns

tpd

UNCK

↑

AF/AE

7

20

7

22

ns

tPLH

RESET low

AF/AE

2

12

2

14

ns

tPLH

LDCK

↑

HF

5

20

5

22

ns

tPHL

UNCK

↑

HF

7

20

7

22

ns

tPHL

RESET low

HF

3

14

3

16

ns

ten

OE

Any Q

2

10

2

11

ns

tdis

OE

Any Q

2

11

2

12

ns

PARAMETER

TEST CONDITIONS

TYP

UNIT

Cpd

Power dissipation capacitance per FIFO channel

Outputs enabled

CL = 50 pF,

f = 5 MHz

53

pF