SN74F574

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP

WITH 3-STATE OUTPUTS

SDFS005A – D3034, SEPTEMBER 1987 – REVISED OCTOBER 1993

Copyright

2–1

POST OFFICE BOX 655303

Package

Small-Outline Packages and Standard

Plastic 300-mil DIPs

description

This 8-bit flip-flop features 3-state outputs

designed specifically for driving highly capacitive

or relatively low-impedance loads. It is particularly

suitable for implementing buffer registers, I/O

ports, bidirectional bus drivers, and working

registers.

The eight flip-flops of the SN74F574 are edge-triggered D-type flip-flops. On the positive transition of the clock

(CLK) input, the Q outputs will be set to the logic levels that were set up at the data (D) inputs.

A buffered output enable (OE) input can be used to place the eight outputs in either a normal logic state (high

or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive

the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus

lines without need for interface or pullup components.

The output enable (OE) does not affect the internal operations of the flip-flops. Old data can be retained or new

data can be entered while the outputs are in the high-impedance state.

The SN74F574 is characterized for operation from 0

°C to 70°C.

FUNCTION TABLE

(each flip-flop)

INPUTS

OUTPUT

OE

CLK

D

Q

L

↑

H

H

L

↑

LL

L

LX

Q0

H

X

X

Z

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

OE

1D

2D

3D

4D

5D

6D

7D

8D

GND

1Q

2Q

3Q

4Q

5Q

6Q

7Q

8Q

CLK

DW OR N PACKAGE

(TOP VIEW)

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.