SN74LVC16646

16-BIT BUS TRANSCEIVER AND REGISTER

WITH 3-STATE OUTPUTS

SCAS318B – NOVEMBER 1993 – REVISED JULY 1995

1

POST OFFICE BOX 655303

Widebus

™ Family

CMOS) Submicron Process

Per JEDEC Standard JESD-17

Need for External Pullup/Pulldown

Resistors

Shrink Small-Outline (DL) and Thin Shrink

Small-Outline (DGG) Packages

description

This 16-bit bus transceiver and register is

The SN74LVC16646 can be used as two 8-bit

transceivers or one 16-bit transceiver. The device

consists of bus transceiver circuits, D-type

flip-flops, and control circuitry arranged for

multiplexed transmission of data directly from the

input bus or from the internal registers.

Data on the A or B bus is clocked into the registers

on the low-to-high transition of the appropriate

clock (CLKAB or CLKBA) input. Figure 1

illustrates the four fundamental bus-management

functions that can be performed with the

SN74LVC16646.

Output-enable (OE) and direction-control (DIR) inputs control the transceiver functions. In the transceiver

mode, data present at the high-impedance port may be stored in either register or in both. The select-control

(SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The circuitry used for select

control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored

and real-time data. DIR determines which bus receives data when OE is low. In the isolation mode (OE high),

A data may be stored in one register and/or B data may be stored in the other register.

When an output function is disabled, the input function is still enabled and can be used to store and transmit

data. Only one of the two buses, A or B, may be driven at a time.

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or floating data inputs at a valid logic level.

The SN74LVC16646 is characterized for operation from – 40

°C to 85°C.

Copyright

© 1995, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

EPIC and Widebus are trademarks of Texas Instruments Incorporated.

DGG OR DL PACKAGE

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1DIR

1CLKAB

1SAB

GND

1A1

1A2

1A3

1A4

1A5

GND

1A6

1A7

1A8

2A1

2A2

2A3

GND

2A4

2A5

2A6

2A7

2A8

GND

2SAB

2CLKAB

2DIR

1OE

1CLKBA

1SBA

GND

1B1

1B2

1B3

1B4

1B5

GND

1B6

1B7

1B8

2B1

2B2

2B3

GND

2B4

2B5

2B6

2B7

2B8

GND

2SBA

2CLKBA

2OE

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.