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SN75185 Datasheet(PDF) 1 Page - Texas Instruments |
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SN75185 Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 10 page ![]() SN75185 MULTIPLE RS-232 DRIVERS AND RECEIVERS SLLS181A – DECEMBER 1994 – REVISED NOVEMBER 1998 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Single Chip With Easy Interface Between UART and Serial Port Connector of IBM PC/AT ™ and Compatibles D Three Drivers and Five Receivers Meet or Exceed the Requirements of TIA / EIA-232-F and ITU v.28 Standards D Designed to Support Data Rates Up To 120 kbps D ESD Protection Meets or Exceeds 10 kV on RS-232 Pins and 5 kV on All Other Pins (Human-Body Model) D Pinout Compatible With the SN75C185 description The SN75185 combines three drivers and five receivers from TI trade-standard SN75188 and SN75189 bipolar quadruple drivers and receivers, respectively. The pinout matches the flow-through design of the SN75C185 to decrease the part count, reduce the board space required, and allow easy interconnection of the UART and serial-port connector of IBM ™ PC/AT™ and compatibles. The bipolar circuits and processing of the SN75185 provides a rugged low-cost solution for this function at the expense of quiescent power and external passive components relative to the SN75C185. The SN75185 complies with the requirements of the TIA/EIA-232-F and ITU (formerly CCITT) v.28 standards. These standards are for data interchange between a host computer and peripheral at signaling rates up to 20 kbit/s. The switching speeds of the SN75185 are fast enough to support rates up to 120 kbit/s with lower capacitive loads (shorter cables). Interoperability at the higher signaling rates cannot be assured unless the designer has design control of the cable and the interface circuits at both ends. For interoperability at signaling rates to 120 kbit/s, use of TIA/EIA-423-B (ITU v.10) and TIA/EIA-422-B (ITU v.11) standards are recommended. The SN75185 is characterized for operation over the temperature range of 0 °C to 70°C. logic symbol† 9 8 7 6 5 4 3 2 RY5 DA3 RY4 DA2 DA1 RY3 RY2 RY1 RA5 DY3 RA4 DY2 DY1 RA3 RA2 RA1 12 13 14 15 16 17 18 19 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) RY1 RA1 RY2 RA2 RY3 RA3 DA1 DY1 DA2 DY2 RY4 RA4 DA3 DY3 RY5 RA5 Copyright © 1998, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VDD RA1 RA2 RA3 DY1 DY2 RA4 DY3 RA5 VSS VCC RY1 RY2 RY3 DA1 DA2 RY4 DA3 RY5 GND DW OR N PACKAGE (TOP VIEW) IBM and PC/AT are trademarks of IBM Corporation. |
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