TLV5535

8-BIT, 35 MSPS, LOW-POWER ANALOG-TO-DIGITAL CONVERTER

SLAS221 – JUNE 1999

6

POST OFFICE BOX 655303

voltage references (unless otherwise noted) (continued)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Rref

Reference input resistance

400

Ω

Iref

Reference input current

2.5

mA

reference outputs

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

V(REFTO)

Reference top offset voltage

Absolute min/max values valid

2.07

2 + [(AVDD – 3) ÷ 2]

2.21

V

V(REFBO)

Reference bottom offset voltage

and tested for AVDD = 3.3 V

1.09

1 + [(AVDD – 3) ÷ 2]

1.21

V

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

fin = 1 MHz

6.6

7.4

Effective number of bits (ENOB)

fin = 4.2 MHz

6.6

7.4

Bits

fin = 15 MHz

7

fin = 1 MHz

41.5

46

Signal-to-noise ratio + distortion (SNRD)

fin = 4.2 MHz

41.5

46

dB

fin = 15 MHz

43

fin = 1 MHz

–46

–55

Total harmonic distortion (THD)

fin = 4.2 MHz

–45.5

–54

dB

fin = 15 MHz

–50

fin = 1 MHz

48

58

Spurious free dynamic range (SFDR)

fin = 4.2 MHz

48

58

dB

fin = 15 MHz

52

Analog input full-power bandwidth, BW

See Note 4

600

MHz

Differential phase DP

f35 MH

f

4 2 MH

06°

Differential phase, DP

fCLK = 35 MHz, fin = 4.2 MHz,

0.6

Differential gain DG

CLK

in

20 IRE amplitude vs full-scale of 140 IRE

02%

Differential gain, DG

20 IRE am litude vs full scale of 140 IRE

0.2%

† Based on analog input voltage of – 1-dB FS referenced to a 1.3 Vpp full-scale input range and using the external voltage references at

fCLK = 35 MSPS with AVDD = DVDD = 3.3 V and DRVDD = 3 V at 25°C.

NOTE 4: The analog input bandwidth is defined as the maximum frequency of a –1-dB FS input sine that can be applied to the device for which

an extra 3-dB attenuation is observed in the reconstructed output signal.