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SRT512 Datasheet(PDF) 14 Page - STMicroelectronics |
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SRT512 Datasheet(HTML) 14 Page - STMicroelectronics |
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14 / 46 page  Memory mapping SRT512 14/46 Doc ID 13277 Rev 4 4 Memory mapping The SRT512 is organized as 16 blocks of 32 bits as shown in Table 12. All blocks are accessible by the Read_block command. Depending on the write access, they can be updated by the Write_block command. A Write_block updates all the 32 bits of the block. Figure 12. SRT512 memory mapping Block Addr MSB 32-bit block LSB b31 b16 b15 b14 b8 b7 b0 Description 0User area lockable EEPROM 1User area 2User area 3User area 4User area 5 32 bits binary counter Count down counter 6 32 bits binary counter 7User area Lockable EEPROM 8User area 9User area 10 User area 11 User area 12 User area 13 User area 14 User area 15 User area 255 OTP_Lock_Reg 1 ST Reserved Fixed Chip_ID (Option) System OTP bits UID0 64 bits UID area ROM UID1 |
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