TMC2490AR2C datasheet(4/36 Pages) CADEKA

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TMC2490A

PRODUCT SPECIFICATION

REV. 1.0.2 2/27/02

SDA, R/W

R-Bus/TTL

Serial Data/Read/Write Control. When SER is LOW, SDA is the

data line of the serial interface. When SER is HIGH, the pin is the

read/write control for the parallel interface. When R/W and CS are

LOW, the microprocessor can write to the control registers over

D7-0. When R/W is HIGH and CS is LOW, it can read the

contents of any selected control register over D7-0.

SCL, CS

R-Bus/TTL

Serial Clock/Chip Select. When SER is LOW, SCL is the clock

line of the serial interface. When SER is HIGH, the pin is the chip

select control for the parallel interface. When CS is HIGH, the

microprocessor interface port, D7-0, is set to HIGH impedance

and ignored. When CS is LOW, the microprocessor can read or

write parameters over D7-0.

SER

TTL

Serial/Parallel Port Select. When LOW, the 2-line serial

interface is activated. Pins 5, 6, and 7 function as SA0, SDA, and

SCL respectively. When HIGH, the parallel interface port is active

and pins 5, 6, and 7 function as ADR, R/W, and CS respectively.

Outputs

CHROMA

1.35V p-p

Chrominance-only Video. Analog output of chrominance D/A

converter. Maximum output is 1.35 volts peak-to-peak into a

doubly terminated 75 Ohm load.

COMPOSITE

1.35V p-p

Composite NTSC/PAL Video. Analog output of composite D/A

converter. Maximum output is 1.35 volts peak-to-peak into a

doubly terminated 75 Ohm load.

LUMA

1.35V p-p

Luminance-only Video. Analog output of luminance D/A

converter. Maximum output is 1.35 volts peak-to-peak into a

doubly terminated 75 Ohm load.

Analog Interface

CBYP

0.1

µF

Reference Bypass Capacitor. Connection point for 0.1

µF

decoupling capacitor to VDD at pin 34.

RREF

787

Ω

Current-setting Resistor. Connection point for external current-

setting resistor for D/A converters. The resistor is connected

between RREF and GND. Output video levels are inversely

proportional to the value of RREF.

VREF

+1.235V

Voltage Reference Input. External voltage reference input,

internal voltage reference output, nominally 1.235 V.

SYNC Out

HSYNC

TTL

Horizontal Sync Output.

VSYNC, T/B

TTL

Vertical Sync Output or Odd/Even Field ID Output.

CBSEL, PDC

TTL

Pixel Data Phase Output or Video Blanking Output.

SELC

TTL

Luma/Chroma MUX Control.

Power Supply

VDD

1, 23, 26, 37

+5V

Power Supply. Positive power supply.

GND

2, 13, 24, 29,

31, 36

0.0V

Ground.

VDDA

+5V

Analog Power Supply. Positive power supply.

Pin Descriptions (continued)

Pin Name

Pin Number

Value

Pin Function Description

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