TMC22091 datasheet(32/60 Pages) CADEKA

32 / 60 page

TMC22091/TMC22191

PRODUCT SPECIFICATION

VITS Insertion

In both NTSC and PAL, the TMC22x91 can be set up to

allow Vertical Interval Test Signals (VITS) in the vertical

interval in place of normal black burst lines (UBB). This is

controlled by Interface Control Register bit 7. If this bit is

LOW, UBB lines are black burst and are independent of

TMC22x91 input data. If the bit is HIGH, all vertical interval

UBB lines become UVV. UVV lines are active video and

depend upon data input to the TMC22x91. VITS lines may

carry special test signals or pass captioning data through the

encoder.

Edge Control

SMPTE 170M NTSC and Report 624 PAL video standards

call for speciﬁc rise and fall times on critical portions of the

video waveform. The TMC22x91 does this automatically.

The TMC22x91 digitally deﬁnes slopes compatible with

SMPTE 170M NTSC or CCIR Report 624 PAL on:

H and V Sync leading and trailing edges.

Burst envelope.

Active video leading and trailing edges.

Subcarrier Programming

The color subcarrier is produced by an internal 32-bit digital

frequency synthesizer which is completely programmable in

frequency and phase. Separate registers are provided for phase

adjustment of the color burst and of the active video, permit-

ting external delay compensation and color adjustment.

In Master or Slave mode, the subcarrier is internally syn-

chronized to establish and maintain a speciﬁed relationship

between the falling edge of horizontal sync and color burst

phase (SCH). In NTSC and PAL, SCH synchronization is

performed every eight ﬁelds, on ﬁeld 1 of the eight-ﬁeld

sequence. Proper subcarrier phase is maintained through the

entire eight ﬁelds, including the 25 Hz offset in PAL

systems. See the description of 8FSUBR under Test Control

In Genlock mode, the phase and relative frequency of the

incoming video are transmitted by the TMC22071 Genlock-

ing Video Digitizer over the CVBS bus at the beginning of

each line, which synchronize the digital subcarrier synthe-

sizer. When key control register bit BUKEN is HIGH and

digitized burst from the TMC22071 is passed through to the

reconstruction D/A converter, the reference subcarrier for the

chrominance modulator is still synthesized within the

encoder.

Table 12. Standard Timing Parameters

Notes:

1. XBP, VA, VC, and VB are 10-bit values. The 2 MSBs for these four variables are in Timing Register 18. See Table 3.

2. EH and SL are 9-bit values. A most significant "1" is forced by the TMC22x91 since EH and SL must range from 256 to 511.

EH and SL may be extended to 767. Only the eight LSBs are stored in Timing Registers 1B and 1C.

3. Every calculated timing parameter has a minimum value of 5 except EH and SL which have minimum values of 256.

Standard

Field

Rate

(Hz)

Horizontal

Freq.

(kHz)

Pixel

Rate

(Mpps)

PXCK

Freq.

(MHz)

Timing Register (hex)

CBP

XBP

Note 1

EH2

SL2

CBL

NTSC sqr.

pixel

59.94 15.734266

12.27

24.54

NTSC

CCIR-601

59.94 15.734266

13.50

27.00

NTSC 4x

FSC

59.94 15.734266

14.32

28.64

PAL sqr.

pixel

50.00 15.625000

14.75

29.50

PAL

CCIR-601

50.00 15.625000

13.50

27.00

PAL 15

Mpps

50.00 15.625000

15.00

30.00

PAL-M

sqr.pixel

60.00 15.750000

12.50

25.01

PAL-M

CCIR-601

60.00 15,750000

13.50

27.00

PAL-M 4x

FSC

60.00 15,750000

14.30

28.60

TMC22091 Datasheet(PDF) 32 Page - Cadeka Microcircuits LLC.

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