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FDMS7656AS Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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FDMS7656AS Datasheet(HTML) 2 Page - Fairchild Semiconductor |
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2 / 8 page ![]() FDMS7656AS Rev.C www.fairchildsemi.com 2 Electrical Characteristics T J = 25 °C unless otherwise noted Off Characteristics On Characteristics Dynamic Characteristics Switching Characteristics Drain-Source Diode Characteristics Symbol Parameter Test Conditions Min Typ Max Units BVDSS Drain to Source Breakdown Voltage ID = 1 mA, VGS = 0 V 30 V ∆BV DSS ∆T J Breakdown Voltage Temperature Coefficient ID = 10 mA, referenced to 25 °C 19 mV/°C IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 500 µA IGSS Gate to Source Leakage Current, Forward VGS = 20 V, VDS = 0 V 100 nA VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 1 mA 1.2 1.6 3.0 V ∆V GS(th) ∆T J Gate to Source Threshold Voltage Temperature Coefficient ID = 10 mA, referenced to 25 °C -5 mV/°C rDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 30 A 1.3 1.8 m Ω VGS = 7 V, ID = 27 A 1.5 1.9 VGS = 4.5 V, ID = 25 A 1.6 2.0 VGS = 10 V, ID = 30 A, TJ = 125 °C 1.8 2.5 gFS Forward Transconductance VDS = 5 V, ID = 30 A 161 S Ciss Input Capacitance VDS = 15 V, VGS = 0 V, f = 1 MHz 6545 8705 pF Coss Output Capacitance 2465 3280 pF Crss Reverse Transfer Capacitance 210 315 pF Rg Gate Resistance 0.5 1.1 Ω td(on) Turn-On Delay Time VDD = 15 V, ID = 30 A, VGS = 10 V, RGEN = 6 Ω 22 35 ns tr Rise Time 12 21 ns td(off) Turn-Off Delay Time 50 80 ns tf Fall Time 713 ns Qg Total Gate Charge VGS = 0 V to 10 V VDD = 15 V, ID = 30 A 95 133 nC Qg Total Gate Charge VGS = 0 V to 4.5 V 43 60 nC Qgs Gate to Source Charge 18.2 nC Qgd Gate to Drain “Miller” Charge 9.1 nC VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = 2 A (Note 2) 0.37 0.7 V VGS = 0 V, IS = 30 A (Note 2) 0.74 1.2 trr Reverse Recovery Time IF = 30 A, di/dt = 300 A/µs 50 81 ns Qrr Reverse Recovery Charge 84 136 nC Notes: 1. RθJA is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. 2. Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%. 3. EAS of 242 mJ is based on starting TJ = 25 °C, L = 1 mH, IAS = 22 A, VDD = 27 V, VGS = 10 V. 100% test at L = 0.3 mH, IAS = 34 A. 4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied. a. 50 °C/W when mounted on a 1 in2 pad of 2 oz copper. b. 125 °C/W when mounted on a minimum pad of 2 oz copper. |
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