P r o d u c t I n n o v a t i o n F r o m

PA07M/883

PA07MU

1

PA07M/883

SG

PARAMETER

SYMBOL

TEMP. POWER

TEST CONDITIONS

MIN

MAX

UNITS

1

Quiescent Current

I

Q

25°C

±35V

V

30

mA

1

Input Offset Voltage

V

OS

25°C

±35V

V

2

mV

1

Input Offset Voltage

V

OS

25°C

±12V

V

4.3

mV

1

Input Offset Voltage

V

OS

25°C

±50V

V

3.5

mV

1

Input Bias Current, +IN

+I

B

25°C

±35V

V

50

pA

1

Input Bias Current, –IN

–I

B

25°C

±35V

V

50

pA

1

Input Offset Current

I

OS

25°C

±35V

V

50

pA

3

Quiescent Current

I

Q

–55°C

±35V

V

46

mA

3

Input Offset Voltage

V

OS

–55°C

±35V

V

4.4

mV

3

Input Offset Voltage

V

OS

–55°C

±12V

V

6.7

mV

3

Input Offset Voltage

V

OS

–55°C

±50V

V

5.9

mV

3

Input Bias Current, +IN

+I

B

–55°C

±35V

V

50

pA

3

Input BiasCurrent, –IN

–I

B

–55°C

±35V

V

50

pA

3

Input Offset Current

I

OS

–55°C

±35V

V

50

pA

2

Quiescent Current

I

Q

125°C

±35V

V

30

mA

2

Input Offset Voltage

V

OS

125°C

±35V

V

5

mV

2

Input Offset Voltage

V

OS

125°C

±12V

V

7.3

mV

2

Input Offset Voltage

V

OS

125°C

±50V

V

6.5

mV

2

Input Bias Current, +IN

+I

B

125°C

±35V

V

10

nA

2

Input Bias Current, –IN

–I

B

125°C

±35V

V

10

nA

2

Input Offset Current

I

OS

125°C

±35V

V

10

nA

4

Output Voltage, I

V

O

25°C

±15.3V

R

10.3

V

4

Output Voltage, I

V

O

25°C

±50V

R

45

V

4

Output Voltage, I

V

O

25°C

±29V

R

24

V

4

Current Limits

I

CL

25°C

±19V

R

.54

.86

A

4

Stability/Noise

E

N

25°C

±35V

R

1

mV

4

Slew Rate

SR

25°C

±35V

R

2.5

10

V/µs

4

Open Loop Gain

A

OL

25°C

±35V

R

89

dB

4

Common Mode Rejection

CMR

25°C

±34.5V

R

80

dB

6

Output Voltage, I

V

O

–55°C

±15.3V

R

10.3

V

6

Output Voltage, I

V

O

–55°C

±50V

R

45

V

6

Output Voltage, I

V

O

–55°C

±29V

R

24

V

6

Stability/Noise

EN

–55°C

±35V

R

1

mV

6

Slew Rate

SR

–55°C

±35V

R

2.5

10

V/µs

6

Open Loop Gain

A

OL

–55°C

±35V

R

89

dB

6

Common Mode Rejection

CMR

–55°C

±34.5V

R

80

dB

5

Output Voltage, I

V

O

125°C

±11.3V

R

6.3

V

5

Output Voltage, I

V

O

125°C

±50V

R

45

V

5

Output Voltage, I

V

O

125°C

±29V

R

24

V

5

Stability/Noise

E

N

125°C

±35V

R

1

mV

5

Slew Rate

SR

125°C

±35V

R

1.25

10

V/µs

5

Open Loop Gain

A

OL

125°C

±35V

R

89

dB

5

Common Mode Rejection

CMR

125°C

±34.5V

R

80

dB

BURN IN CIRCUIT

*

These components are used to stabilize device due

to poor high frequency characteristics of burn in

board.

**

Input signals are calculated to result in internal power

dissipation of approximately 2.1W at case tempera-

ture = 125°C.

100KΩ

1Ω

1Ω

100KΩ

+15V

–15V

5

6

2

1

8

3

20Ω

**

*

U.U.T

4

*

Table 4 Group A Inspection

PA07M/883

P r o d u c t I n n o v a t i o n F r o m

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(All Rights Reserved)

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