24LC014HT-ESLASHST datasheet(8/28 Pages) MICROCHIP

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24AA014H/24LC014H

DS22077B-page 8

Preliminary

5.0

DEVICE ADDRESSING

A control byte is the first byte received following the

Start condition from the master device (Figure 5-1).

The control byte consists of a four-bit control code; for

the 24AA014H/24LC014H this is set as ‘1010’ binary

for read and write operations. The next three bits of the

control byte are the Chip Select bits (A2, A1, A0). The

Chip Select bits allow the use of up to eight 24AA014H/

24LC014H devices on the same bus and are used to

select which device is accessed. The Chip Select bits

in the control byte must correspond to the logic levels

on the corresponding A2, A1 and A0 pins for the device

to respond. These bits are in effect the three Most

Significant bits of the word address.

The last bit of the control byte defines the operation to

be performed. When set to a ‘1’, a read operation is

selected. When set to a ‘0’, a write operation is

selected. Following the Start condition, the 24AA014H/

24LC014H monitors the SDA bus, checking the control

byte being transmitted. Upon receiving a ‘1010’ code

and appropriate Chip Select bits, the slave device

outputs an Acknowledge signal on the SDA line.

Depending on the state of the R/W bit, the 24AA014H/

24LC014H will select a read or write operation.

FIGURE 5-1:

CONTROL BYTE FORMAT

5.1

Contiguous Addressing Across

Multiple Devices

The Chip Select bits A2, A1 and A0 can be used to

expand the contiguous address space for up to 8K bits

by adding up to eight 24AA014H/24LC014H devices on

the same bus. In this case, software can use A0 of the

control byte as address bit A8, A1 as address bit A9,

and A2 as address bit A10. It is not possible to

sequentially read across device boundaries.

SACK

R/W

Control Code

Chip Select

Bits

Slave Address

Acknowledge Bit

Start Bit

Read/Write Bit

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