56F8355 datasheet(9/172 Pages) FREESCALE

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Device Description

56F8355 Technical Data, Rev. 17

Freescale Semiconductor

Preliminary

The 56F8355 and 56F8155 support program execution from internal memories. Two data operands can be

accessed from the on-chip data RAM per instruction cycle. These devices also provide two external

dedicated interrupt lines and up to 49 General Purpose Input/Output (GPIO) lines, depending on peripheral

configuration.

1.2.1

56F8355 Features

The 56F8355 controller includes 256KB of Program Flash and 8KB of Data Flash (each programmable

through the JTAG port) with 4KB of Program RAM and 16KB of Data RAM. A total of 16KB of Boot

Flash is incorporated for easy customer inclusion of field-programmable software routines that can be used

to program the main Program and Data Flash memory areas. Both Program and Data Flash memories can

be independently bulk erased or erased in page sizes. Program Flash page erase size is 1KB. Boot and Data

Flash page erase size is 512 bytes. The Boot Flash memory can also be either bulk or page erased.

A key application-specific feature of the 56F8355 is the inclusion of two Pulse Width Modulator (PWM)

modules. These modules each incorporate three complementary, individually programmable PWM signal

output pairs (each module is also capable of supporting six independent PWM functions, for a total of 12

PWM outputs) to enhance motor control functionality. Complementary operation permits programmable

dead time insertion, distortion correction via current sensing by software, and separate top and bottom

output polarity control. The up-counter value is programmable to support a continuously variable PWM

frequency. Edge-aligned and center-aligned synchronous pulse width control (0% to 100% modulation) is

supported. The device is capable of controlling most motor types: ACIM (AC Induction Motors); both

BDC and BLDC (Brush and Brushless DC motors); SRM and VRM (Switched and Variable Reluctance

Motors); and stepper motors. The PWMs incorporate fault protection and cycle-by-cycle current limiting

with sufficient output drive capability to directly drive standard optoisolators. A “smoke-inhibit”,

write-once protection feature for key parameters is also included. A patented PWM waveform distortion

correction circuit is also provided. Each PWM is double-buffered and includes interrupt controls to permit

integral reload rates to be programmable from 1 to 16. The PWM modules provide a reference output to

synchronize the Analog-to-Digital Converters through two channels of Quad Timer C.

The 56F8355 incorporates two Quadrature Decoders capable of capturing all four transitions on the

two-phase inputs, permitting generation of a number proportional to actual position. Speed computation

capabilities accommodate both fast- and slow-moving shafts. An integrated watchdog timer in the

Quadrature Decoder can be programmed with a time-out value to alert when no shaft motion is detected.

Each input is filtered to ensure only true transitions are recorded.

This controller also provides a full set of standard programmable peripherals that include two Serial

Communications Interfaces (SCIs); two Serial Peripheral Interfaces (SPIs); and four Quad Timers. Any of

these interfaces can be used as General-Purpose Input/Outputs (GPIOs) if that function is not required. A

Flex Controller Area Network (FlexCAN) interface (CAN Version 2.0 B-compliant) and an internal

interrupt controller are included on the 56F8355.

1.2.2

56F8155 Features

The 56F8155 controller includes 256KB of Program Flash, programmable through the JTAG port, and

16KB of Data RAM. A total of 16KB of Boot Flash is incorporated for easy customer inclusion of

field-programmable software routines that can be used to program the main Program Flash memory area.

The Program Flash memory can be independently bulk erased or erased in pages; Program Flash page

56F8355 Datasheet(PDF) 9 Page - Freescale Semiconductor, Inc

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