TLE 8444SL

Block Description

Data Sheet

12

Rev. 1.1, 2009-07-07

5

Block Description

5.1

Power Supply

5.1.1

General

drivers are connected to this supply voltage

V

block is generated by an internal bandgap reference circuit derived from the 12V board-net. To block the supply

voltage of the device, a 47µF electrolytic capacitance is recommended. For EMC improvements a 100nF ceramic

Diagrams, Figure 18 and Figure 19 for more information.

5.1.2

Sleep Mode

The TLE 8444SL can be placed in low current-consumption mode (or sleep mode) by setting the input, INH pin to

LOW. The INH pin has an internal pull-down current source. In sleep-mode, all output transistors are switched off.

An output disable and enable time is specified and this behavior is shown in Figure 4 below.

Figure 4

Enable and Disable Delay Time

10%

90%

t

ddis

50%

50%

t

den

I

OUTx

INH

Low

High

V

t

t

ON

OFF

A