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ATmega165 Datasheet(PDF) 216 Page - ATMEL Corporation |
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ATmega165 Datasheet(HTML) 216 Page - ATMEL Corporation |
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216 / 336 page ![]() 216 ATmega165/V 2573G–AVR–07/09 MCU Status Register – MCUSR The MCU Status Register provides information on which reset source caused an MCU reset. • Bit 4 – JTRF: JTAG Reset Flag This bit is set if a reset is being caused by a logic one in the JTAG Reset Register selected by the JTAG instruction AVR_RESET. This bit is reset by a Power-on Reset, or by writing a logic zero to the flag. Boundary-scan Chain The Boundary-scan chain has the capability of driving and observing the logic levels on the digital I/O pins, as well as the boundary between digital and analog logic for analog circuitry having off-chip connection. Scanning the Digital Port Pins Figure 101 shows the Boundary-scan Cell for a bi-directional port pin with pull-up func- tion. The cell consists of a standard Boundary-scan cell for the Pull-up Enable – PUExn – function, and a bi-directional pin cell that combines the three signals Output Control – OCxn, Output Data – ODxn, and Input Data – IDxn, into only a two-stage Shift Register. The port and pin indexes are not used in the following description The Boundary-scan logic is not included in the figures in the datasheet. Figure 102 shows a simple digital port pin as described in the section “External Interrupts” on page 51. The Boundary-scan details from Figure 101 replaces the dashed box in Figure 102. When no alternate port function is present, the Input Data – ID – corresponds to the PINxn Register value (but ID has no synchronizer), Output Data corresponds to the PORT Register, Output Control corresponds to the Data Direction – DD Register, and the Pull-up Enable – PUExn – corresponds to logic expression PUD · DDxn · PORTxn. Digital alternate port functions are connected outside the dotted box in Figure 102 to make the scan chain read the actual pin value. For Analog function, there is a direct connection from the external pin to the analog circuit, and a scan chain is inserted on the interface between the digital logic and the analog circuitry. Bit 765 432 10 – – –JTRF WDRF BORF EXTRF PORF MCUSR Read/Write R R R R/W R/W R/W R/W R/W Initial Value 0 0 0 See Bit Description |
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