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HT48R064 Datasheet(PDF) 21 Page - Holtek Semiconductor Inc |
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HT48R064 Datasheet(HTML) 21 Page - Holtek Semiconductor Inc |
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21 / 93 page ![]() HT48R063/064/065/066/0662/067 Rev. 1.10 21 June 9, 2009 Memory will always result in Bank 0 being accessed irre- spective of the value of the Bank Pointer. Status Register - STATUS This 8-bit register contains the zero flag (Z), carry flag (C), auxiliary carry flag (AC), overflow flag (OV), power down flag (PDF), and watchdog time-out flag (TO). These arithmetic/logical operation and system manage- ment flags are used to record the status and operation of the microcontroller. With the exception of the TO and PDF flags, bits in the status register can be altered by instructions like most other registers. Any data written into the status register will not change the TO or PDF flag. In addition, opera- tions related to the status register may give different re- sults due to the different instruction operations. The TO flag can be affected only by a system power-up, a WDT time-out or by executing the ²CLR WDT² or ²HALT² in- struction. The PDF flag is affected only by executing the ²HALT² or ²CLR WDT² instruction or during a system power-up. The Z, OV, AC and C flags generally reflect the status of the latest operations. In addition, on entering an interrupt sequence or execut- ing a subroutine call, the status register will not be pushed onto the stack automatically. If the contents of the status registers are important and if the interrupt rou- tine can change the status register, precautions must be taken to correctly save it. Note that bits 0~3 of the STATUS register are both readable and writeable bits. Input/Output Ports and Control Registers Within the area of Special Function Registers, the port PA, PB, etc data I/O registers and their associated con- trol register PAC, PBC, etc play a prominent role. These registers are mapped to specific addresses within the Data Memory as shown in the Data Memory table. The data I/O registers, are used to transfer the appropriate output or input data on the port. The control registers specifies which pins of the port are set as inputs and which are set as outputs. To setup a pin as an input, the corresponding bit of the control register must be set high, for an output it must be set low. During program in- itialisation, it is important to first setup the control regis- ters to specify which pins are outputs and which are inputs before reading data from or writing data to the I/O ports. One flexible feature of these registers is the ability to directly program single bits using the ²SET [m].i² and ²CLR [m].i² instructions. The ability to change I/O pins from output to input and vice versa by manipulating spe- cific bits of the I/O control registers during normal pro- gram operation is a useful feature of these devices. · STATUS Register Bit 76543210 Name ¾¾ TO PDF OV Z AC C R/W ¾¾ R R R/W R/W R/W R/W POR ¾¾ 0 0 xxxx ²x² unknown Bit 7, 6 Unimplemented, read as ²0² Bit 5 TO: Watchdog Time-Out flag 0: After power up or executing the ²CLR WDT² or ²HALT² instruction 1: A watchdog time-out occurred. Bit 4 PDF: Power down flag 0: After power up or executing the ²CLR WDT² instruction 1: By executing the ²HALT² instruction Bit 3 OV: Overflow flag 0: no overflow 1: an operation results in a carry into the highest-order bit but not a carry out of the highest-order bit or vice versa. Bit 2 Z: Zero flag 0: The result of an arithmetic or logical operation is not zero 1: The result of an arithmetic or logical operation is zero Bit 1 AC: Auxiliary flag 0: no auxiliary carry 1: an operation results in a carry out of the low nibbles in addition, or no borrow from the high nibble into the low nibble in subtraction Bit 0 C: Carry flag 0: no carry-out 1: an operation results in a carry during an addition operation or if a borrow does not take place during a subtraction operation C is also affected by a rotate through carry instruction. |
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