Sensors

16

Freescale Semiconductor

MMA7455L

Detecting Interrupts

LDX

1: Level detection event is detected on X-axis

0: Level detection event is not detected on X-axis

LDY

1: Level detection event is detected on Y-axis

0: Level detection event is not detected on Y-axis

LDZ

1: Level detection event is detected on Z-axis

0: Level detection event is not detected on Z-axis

PDX

PDY

PDZ

INT1

1: Interrupt assigned by INTRG[1:0] bits in Control 1

Register ($18) and is detected

0: Interrupt assigned by INTRG[1:0] bits in Control 1

Register ($18) and is not detected

INT2

1: Interrupt assigned by INTRG[1:0] bits in Control 1

Register ($18) and is detected

0: Interrupt assigned by INTRG[1:0] bits in Control 1

Register ($18) and is not detected

DIGITAL INTERFACE

microcontroller, which provides the serial clock signal and addresses the slave device(s) on the bus. The MMA7455L communi-

cates only in slave operation where the device address is $1D. Multiple read and write modes are available. The protocol supports

slave only operation. It does not support Hs mode, “10-bit addressing”, “general call” and: ”START byte”.

SINGLE BYTE READ

The MMA7455L has an 10-bit ADC that can sample, convert and return sensor data on request. The transmission of an 8-bit

command begins on the falling edge of SCL. After the eight clock cycles are used to send the command, note that the data re-

read operation. The Master (or MCU) transmits a start condition (ST) to the MMA7455L, slave address ($1D), with the R/W bit

set to “0” for a write, and the MMA7455L sends an acknowledgement. Then the Master (or MCU) transmits the 8-bit address of

the register to read and the MMA7455L sends an acknowledgement. The Master (or MCU) transmits a repeated start condition

(SR) and then addresses the MMA7455L ($1D) with the R/W bit set to “1” for a read from the previously selected register. The

Slave then acknowledges and transmits the data from the requested register. The Master does not acknowledge (NAK) it re-

ceived the transmitted data, but transmits a stop condition to end the data transfer.

MULTIPLE BYTES READ

The MMA7455L automatically increments the received register address commands after a read command is received. Therefore,

after following the steps of a single byte read, multiple bytes of data can be read from sequential registers after each MMA7455L

acknowledgment (AK) is received until a NACK is received from the Master followed by a stop condition (SP) signalling an end

of transmission. See Figure 8.

$0A: Detection Source Register (Read only)

D7

D6

D5

D4

D3

D2

D1

D0

Reg $0A

LDX

LDY

LDZ

PDX

PDY

PDZ

INT2

INT1

Function

000000

00

Default