AS8218 datasheet(108/123 Pages) AMSCO

108 / 123 page

Data Sheet AS8218 / AS8228

Revision 3.0, 31-May-06

Page 108 of 123

Note:

The SBUF register is split up within the UART1 into the internal registers TransmitSBUF (when writing to the

SFR) and ReceiveSBUF (when reading from the SFR)

A write access to SBUF starts a transmission, according to the selected mode. A write access during an

ongoing transmission results in discarding the byte without disturbing the process of transmission. If there is a

series of bytes to be transmitted, the software has to wait until the previous byte has been sent (SCON.TI =

‘1’), before writing to SBUF. The shift sequence (serialization) is handled by means of the internal register

TransmitSBUF that holds up to 12 bits (depending on the mode used): hardcoded ‘1’-bit + start bit + 8 data bits

+ optional ninth data bit + stop bit. During transmitting the content of TransmitSBUF is shift right, thus

transmission is done with LSB first.

A read access to SBUF delivers the latest byte received by the UART1. Bit SCON.RI has to be cleared (to ‘0’)

by the software after fetching a byte from SBUF, thus enabling the UART1 to receive further bytes. If SCON.RI

is not ‘0’ when a new byte is received, the new byte will be discarded (and thus is lost) and SBUF will keep its

old value.

SBAUDH, SBAUDL Baudrate Reload Registers

MSB

LSB

SBAUDL

BR7

BF6

BR5

BR4

BR3

BR2

BR1

BR0

SBAUDH

BR15

BR14

BR13

BR12

BR11

BR10

BR9

BR8

Note:

The SBAUDL and SBAUDH are merged into a 16 bit reload value:

SBAUDL = Baudrate value (7:0)

SBAUDH = Baudrate value (15:8)

Baudrate Generator

Unlike the original 8051 architecture, the UART1 incorporates a built-in baudrate generator. The baudrate is

generated by a counter, which is decremented every clock cycle. When reaching the value 0, the counter is

automatically reloaded. The reload value is a programmable value stored in the 16 bit register formed by

SBAUDH and SBAUDL. A serial bit (during transmit and receive) is further divided into 16 time slices for

accurate sampling. Due to the full-duplex operation there is a separate Transmit Baudrate Timer und Receive

Baudrate Timer implemented for this task.

Baudrate Reload Register

The following table shows some selected values to be loaded to the BRReloadRegister (SBaudH + SBaudL) at

a given clock frequency that may be used with the AS8218 / AS8228 ICs. The smaller the value, the more

difficult it is to meet a demanded baudrate within a given tolerance. If the error is greater than 5% the baudrate

is not appropriate for error-free communication.

Baudrate

[Baud]

3.00MHz

error [%]

3.58MHz

(3579545Hz)

error [%]

4.00MHz

error [%]

110

1704

0.0267

2033

0.0082

2272

0.0120

150

1249

1491

-0.0320

1666

0.0200

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