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DM9010EP Datasheet(PDF) 20 Page - Davicom Semiconductor, Inc.

Part # DM9010EP
Description  10/100 Mbps Single Chip Ethernet Controller with General Processor Interface
PDF  62 Pages
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Manufacturer  DAVICOM [Davicom Semiconductor, Inc.]
Direct Link  http://www.davicom.com.tw
Logo DAVICOM - Davicom Semiconductor, Inc.

DM9010EP Datasheet(HTML) 20 Page - Davicom Semiconductor, Inc.

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DM9010
Single Chip Ethernet Controller with General Processor Interface
Preliminary
20
Version: DM9010-17--DS-P04
Jan. 18, 2006
3:0
JPT
PHS7,
RW
Jam Pattern Time. Default is 200us
bit3 bit2 bit1 bit0
time
0
0
0
0
5us
0
0
0
1
10us
0
0
1
0
15us
0
0
1
1
25us
0
1
0
0
50us
0
1
0
1
100us
0
1
1
0
150us
0
1
1
1
200us
1
0
0
0
250us
1
0
0
1
300us
1
0
1
0
350us
1
0
1
1
400us
1
1
0
0
450us
1
1
0
1
500us
1
1
1
0
550us
1
1
1
1
600us
6.10 Flow Control Threshold Register ( 09H )
Bit
Name
Default
Description
7:4
HWOT
PHS3,
RW
RX FIFO High Water Overflow Threshold
Send a pause packet with pause_ time=FFFFH when the RX RAM free space is
less than this value., If this value is zero, its means no free RX SRAM space.
Default is 3K-byte free space. Please do not exceed SRAM size (1 unit=1K bytes)
3:0
LWOT
PHS8,
RW
RX FIFO Low Water Overflow Threshold
Send a pause packet with pause_time=0000 when RX SRAM free space is larger
than this value. This pause packet is enabled after the high water pause packet is
transmitted. Default SRAM free space is 8K-byte. Please do not exceed SRAM
size
(1 unit=1K bytes)
6.11 RX/TX Flow Control Register ( 0AH )
Bit
Name
Default
Description
7
TXP0
HPS0,RW TX Pause Packet
Auto clears after pause packet transmission completion. Set to TX pause packet
with time = 0000h
6
TXPF
HPS0,RW TX Pause packet
Auto clears after pause packet transmission completion. Set to TX pause packet
with time = FFFFH
5
TXPEN
HPS0,RW Force TX Pause Packet Enable
Enables the pause packet for high/low water threshold control
4
BKPA
HPS0,RW Back Pressure Mode
This mode is for half duplex mode only. It generates a jam pattern when any
packet comes and RX SRAM is over BPHW
3
BKPM
HPS0,RW Back Pressure Mode
This mode is for half duplex mode only. It generates a jam pattern when a packet’s
DA matches and RX SRAM is over BPHW
2
RXPS
HPS0,R/C RX Pause Packet Status, latch and read clearly
1
RXPCS
HPS0,RO
RX Pause Packet Current Status



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