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DM9161 Datasheet(PDF) 28 Page - Davicom Semiconductor, Inc. |
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DM9161 Datasheet(HTML) 28 Page - Davicom Semiconductor, Inc. |
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28 / 50 page ![]() DM9161 10/100 Mbps Fast Ethernet Physical Layer TX/FX Single Chip Transceiver 28 Final Version: DM9161-DS-F05 September 10, 2008 8.7 Auto-negotiation Expansion Register (ANER)- 06 6.15-6.5 Reserved 0, RO Reserved Read as 0, ignore on write 6.4 PDF 0, RO/LH Local Device Parallel Detection Fault PDF = 1: A fault detected via parallel detection function. PDF = 0: No fault detected via parallel detection function 6.3 LP_NP_ABLE 0, RO Link Partner Next Page Able LP_NP_ABLE = 1: Link partner, next page available LP_NP_ABLE = 0: Link partner, no next page 6.2 NP_ABLE 0,RO/P Local Device Next Page Able NP_ABLE = 1: DM9161, next page available NP_ABLE = 0: DM9161, no next page DM9161 does not support this function, so this bit is always 0 6.1 PAGE_RX 0, RO/LH New Page Received A new link code word page received. This bit will be automatically cleared when the register (register 6) is read by management 6.0 LP_AN_ABLE 0, RO Link Partner Auto-negotiation Able A “1” in this bit indicates that the link partner supports Auto-negotiation 8.8 DAVICOM Specified Configuration Register (DSCR) - 16 Bit Bit Name Default Description 16.15 BP_4B5B 0,RW Bypass 4B5B Encoding and 5B4B Decoding 1 = 4B5B encoder and 5B4B decoder function bypassed 0 = Normal 4B5B and 5B4B operation 16.14 BP_SCR 0, RW Bypass Scrambler/Descrambler Function 1 = Scrambler and descrambler function bypassed 0 = Normal scrambler and descrambler operation 16.13 BP_ALIGN 0, RW Bypass Symbol Alignment Function 1 = Receive functions (descrambler, symbol alignment and symbol decoding functions) bypassed. Transmit functions (symbol encoder and scrambler) bypassed 0 = Normal operation 16.12 BP_ADPOK 0, RW BYPASS ADPOK Force signal detector (SD) active. This register is for debug only, not release to customer 1=Forced SD is OK, 0=Normal operation 16.11 REPEATER (Pin#38),RW Repeater/Node Mode The value of the Repeater/Node pin (38) is latched into this bit at power-up/reset 1 = Repeater mode 0 = Node mode 16.10 TX 1, RW 100BASE-TX Mode Control 1 = 100BASE-TX operation 0=100BASE-FX operation 16.9 FEF 0, Rw Far End Fault Enable: Control the Far End Fault mechanism Associated with 100BASE-FX operation |
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