ADV3222ARZ-R7 datasheet(18/20 Pages) AD

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ADV3221/ADV3222

Rev. 0 | Page 18 of 20

APPLICATIONS INFORMATION

The ADV3221 and ADV3222 are high speed multiplexers used

to switch video or RF signals. The low output impedance of the

ADV3221/ADV3222 allows the output environment to be

optimized for use in 75 Ω or 50 Ω systems by choosing the

appropriate series termination resistor. For composite video

applications, the ADV3222 (gain of +2) is typically used to

provide compensation for the loss of the output termination.

CK1/CK2 OPERATION

The ADV3221/ADV3222 provide a double latched architecture

for the A0, A1 (channel selection) and CS (output enable) logic.

This allows for simultaneous update of multiple devices in bank

switching applications or large multiplexer systems consisting of

multiple devices connected to common output busses.

Holding CK1 and CK2 low places the ADV3221/ADV3222 in a

transparent mode. In transparent mode, all logic changes to A0,

A1, and CS immediately affects the input selection and output

enable/disable.

CIRCUIT LAYOUT

Use of proper high speed design techniques is important to

ensure optimum performance. Use a low inductance ground

plane for power supply bypassing and to provide high quality

return paths for the input and output signals. For best performance,

it is recommended that power supplies be bypassed with 0.1 μF

ceramic capacitors as close to the body of the device as possible.

To provide stored energy for lower frequency, high current output

driving, place 10 μF tantalum capacitors farther from the device.

The input and output signal paths should be stripline or micro-

strip controlled impedance. Video systems typically use 75 Ω

characteristic impedance, whereas RF systems typically use

50 Ω. Various calculators are available to calculate the trace

geometry required to produce the proper characteristic

impedance.

TERMINATION

For a controlled impedance situation, termination resistors are

required at the inputs and output of the device. The input

termination should be a shunt resistor to ground with a value

matching the characteristic impedance of the input trace. To

reduce reflections, place the input termination resistor as close

to the device input pin as possible. To minimize the input-to-

input crosstalk, it is important to utilize a low inductance shield

between input traces to isolate each input. Consideration of

ground current paths must be taken to minimize loop currents

in the shields to prevent them from providing a coupling

medium for crosstalk.

For proper matching, the output series termination resistor

should be the same value as the characteristic impedance of the

output trace and placed as close to the output of the device as

possible. This placement reduces the high frequency effect of

series parasitic inductance, which can affect gain flatness and

−3 dB bandwidth.

CAPACITIVE LOAD

A high frequency output can have difficulties when driving a

large capacitive load, usually resulting in peaking in the frequency

domain or overshoot in the time domain. If these effects become

too large, oscillation can result.

The response of the device under various capacitive loads is

shown in Figure 6 through Figure 12, and in Figure 15. If a

condition arises where excessive load capacitance is encoun-

tered and the overshoot is too great or the device oscillates, a

small series resistor of a few tens of ohms can be used to improve

the performance.

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