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WM2619CDT Datasheet(PDF) 8 Page - Wolfson Microelectronics plc

Part # WM2619CDT
Description  12-bit Parallel Input Voltage Output DAC
PDF  9 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM2619CDT Datasheet(HTML) 8 Page - Wolfson Microelectronics plc

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WM2619
Production Data
WOLFSON MICROELECTRONICS LTD
Production Data Rev 1.0 June 1999
8
DEVICE DESCRIPTION
GENERAL FUNCTION
The device uses a resistor string network buffered with an op amp to convert 12-bit digital data to
analogue voltage levels (see Block Diagram). The output voltage is determined by the reference
input voltage and the input code according to the following relationship:
Output voltage =
( )
4096
CODE
V
2
REF
INPUT
OUTPUT
1111
1111
1111
( )
4096
4095
V
2
REF
:
:
1000
0000
0001
( )
4096
2049
V
2
REF
1000
0000
0000
( )
REF
REF
V
4096
2048
V
2
=
0111
1111
1111
( )
4096
2047
V
2
REF
:
:
0000
0000
0001
( )
4096
1
V
2
REF
0000
0000
0000
0V
Table 1 Binary Code Table (0V to 2VREFIN Output), Gain = 2
POWER ON RESET
An internal power-on-reset circuit resets the DAC register to all 0s on power-up.
BUFFER AMPLIFIER
The output buffer has a near rail-to-rail output with short circuit protection and can reliably drive a
2k
Ω load with a 100pF load capacitance.
EXTERNAL REFERENCE
The reference voltage input is buffered which makes the DAC input resistance independent of
code. The REFIN pin has an input resistance of 10M
Ω and an input capacitance of typically 5pF.
The reference voltage determines the DAC full-scale output.
HARDWARE CONFIGURATION OPTIONS
The WM2619 has two configuration options that are controlled by device pins.
DEVICE POWERDOWN
The device can be powered-down by pulling pin NPD (pin 15) high. This powers down the DAC.
This will reduce power consumption significantly. When the power down function is released the
device reverts to the DAC code set prior to power down.
DAC UPDATE
The NLDAC pin (Pin 16) can be held high to prevent serial word writes from updating the DAC
latch. By writing the new value to the DAC then pulling NLDAC low, the new DAC code is loaded
into the DAC latch.
PARALLEL INTERFACE
The device registers data on the positive edge of NWE (Pin 17). It must be enabled with NCS
(Pin 18) low.



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