NX2119 datasheet(13/16 Pages) MICROSEMI

13 / 16 page

NX2119/2119A

Rev.3.2

04/10/08

HCON

OUT

DS(ON)

LCON

OUT

DS(ON)

TOTAL

HCON

LCON

(1 D) RK

=PP

× ××

× −

××

...(20)

where the RDS(ON) will increases as MOSFET junc-

tion temperature increases, K is RDS(ON) temperature

dependency. As a result, RDS(ON) should be selected for

the worst case, in which K approximately equals to 1.4

at 125oC according to IRFR3706 datasheet

. Conduc-

tion loss should not exceed package rating or overall

system thermal budget.

Switching loss is mainly caused by crossover con-

duction at the switching transition. The total switching

loss can be approximated.

OUT

SWS

= ×

×××

...(21)

where IOUT is output current, TSW is the sum of T

and T

F which can be found in mosfet datasheet, and F

is switching frequency. Switching loss PSW is frequency

dependent.

Also MOSFET gate driver loss should be consid-

ered when choosing the proper power MOSFET.

MOSFET gate driver loss is the loss generated by dis-

charg

ing the gate capacitor and is dissipated in driver

circuits.It is proportional to frequency and is defined as:

gate

HGATE

HGS

LGATE

LGSS

××

...(22)

where QHGATE is the high side MOSFETs gate

charge,QLGATEis the low side MOSFETs gate charge,VHGS

is the high side gate source voltage, and V

LGS is the low

side gate source voltage.

This power dissipation should not exceed maxi-

mum power dissipation of the driver device.

Over Current Limit Protection

Over current Limit for step down converter is

achieved by sensing current through the low side

MOSFET. For NX2119, the current limit is decided by

the R

DSON of the low side mosfet.

When synchronous

FET is on, and the voltage on SW pin is below 320mV,

the over current occurs. The over current limit can be

calculated by the following equation.

SET

DSON

320mV

K R

If MOSFET R

DSON=9mΩ, the worst case thermal

consideration K=1.5, then

SET

DSON

320mV

23.7A

K R

1.5 9m

×Ω

Layout Considerations

The layout is very important when designing high

frequency switching converters. Layout will affect noise

pickup and can cause a good design to perform with

less than expected results.

Start to place the power components, make all the

connection in the top layer with wide, copper filled ar-

eas. The inductor, output capacitor and the MOSFET

should be close to each other as possible. This helps to

reduce the EMI radiated by the power traces due to the

high switching currents through them. Place input ca-

pacitor directly to the drain of the high-side MOSFET, to

reduce the ESR replace the single input capacitor with

two parallel units. The feedback part of the system should

be kept away from the inductor and other noise

sources,and be placed close to the IC. In multilayer PCB

use one layer as power ground plane and have a control

circuit ground (analog ground), to which all signals are

referenced.

The goal is to localize the high current path to a

separate loop that does not interfere with the more sen-

sitive analog control function. These two grounds must

be connected together on the PC board layout at a single

point.

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