BU2050F,BU2092F,BU2092FV,BU2099FV,BD7851FP,BU2152FS

Technical Note

19/24

www.rohm.com

2009.06 - Rev.A

© 2009 ROHM Co., Ltd. All rights reserved.

【

BU2152FS】

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Pin descriptions

Pin

No.

Pin Name

I/O

Function

1

-

Ground

2

CLK

I

Clock Input

3

-

Ground

4

DATA

I

Serial Data Input

5～28

P1～P24

O

Parallel Data Output

29

SO

O

Cascade Output

30

STB

I

Strobe Signal Input active “L”

31

CLB

I

Clear Signal Input active “L”

32

-

Power Supply

●

Timing chart

Fig. 18

1.

After the power is turned on and the voltage is stabilized, STB should be activated, after clocking 24 data bits into

the DATA terminal.

2.

Pn parallel output data of the shift register is set after the 24

3.

Since the STB is a label latch, data is retained in the “H” section and renewed in the “L” section of the STB.

4.

The final stage data of the shift register is outputted to the SO by synchronizing with the rise time of the CLOCK.

［

Truth Table］

Input

Function

CLK

STB

CLB

×

×

L

All the data of the latch circuit are set to “H” (data of shift register does not

change), all the parallel outputs are “H”.

H

H

Serial data of DATA pin are latched to the shift register.

At this time, the data of the latch circuit does not change.

L

L

H

The data of the shift register are transferred to the latch circuit, and the data of

the latch circuit are outputted from the parallel output pin.

H

The data of the shift register shifts 1bit, and the data of the latch circuit and

parallel output also change.

CLK

STB

DATA

DATA24

DATA23

DATA22

DATA2

DATA1

SO

Previous

DATA24

Previous

DATA23

Previous

DATA2

DATA24

Previous

DATA1

DATA23

DATA22

Pn

Previous DATA

DATA