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X88C64PI Datasheet(PDF) 11 Page - Xicor Inc. |
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X88C64PI Datasheet(HTML) 11 Page - Xicor Inc. |
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11 / 14 page ![]() X88C64 11 WR Controlled Write Cycle Symbol Parameter Min. Max. Units tLHLL ALE Pulse Width 80 ns tAVLL Address Setup Time 20 ns tLLAX Address Hold Time 30 ns tDVWH Data Setup Time 50 ns tWHDX Data Hold Time 30 ns tELLL Chip Enable Setup Time 7 ns tWLWH WR Pulse Width 120 ns tWRS WR Setup Time 30 ns tWRH WR Hold Time 20 ns tBLC Byte Load Time (Page Write) 0.5 100 µs tWC (7) Write Cycle Time 5 ms 3867 PGM T11 WR Controlled Write Timing Diagram Note: (7) tWC is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum time the device requires to automatically complete the internal write operation. 3867 FHD F07 ALE A/D0–A/D7 A8–A12 WR AIN tDVWH DIN tWHDX tWRH tWRH tLHLL tAVLL tLLAX tWRS tWLWH ADDRESS CE tELLL |
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