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AMPL138ZWT3 Datasheet(PDF) 59 Page - Texas Instruments

Part # AMPL138ZWT3
Description  OMAP-L138 Low-Power Applications Processor
PDF  268 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AMPL138ZWT3 Datasheet(HTML) 59 Page - Texas Instruments

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3.9.23
Universal Parallel Port (uPP)
OMAP-L138 Low-Power Applications Processor
www.ti.com
SPRS586A – JUNE 2009 – REVISED AUGUST 2009
Table 3-26. Universal Parallel Port (uPP) Terminal Functions
SIGNAL
POWER
TYPE(1)
PULL(2)
DESCRIPTION
GROUP(3)
NAME
NO.
VP_CLKIN0 / UHPI_HCS1 /PRU1_R30[10] / GP6[7] /
uPP 2x transmit clock
W14
I
CP[25]
C
UPP_2xTXCLK
input
PRU0_R30[25] /MMCSD1_DAT[0] / UPP_CHB_CLOCK /
G1
I/O
CP[30]
C
uPP channel 0 clock
GP8[15]/PRU1_R31[27]
PRU0_R30[24]/ MMCSD1_CLK / UPP_CHB_START / GP8[14] /
G2
I/O
CP[30]
C
uPP channel 0 start
PRU1_R31[26]
PRU0_R30[23] / MMCSD1_CMD / UPP_CHB_ENABLE /
J4
I/O
CP[30]
C
uPP channel 0 enable
GP8[13]/PRU1_R31[25]
PRU0_R30[22] / PRU1_R30[8] / UPP_CHB_WAIT / GP8[12]/
G3
I/O
CP[30]
C
uPP channel 0 wait
PRU1_R31[24]
PRU0_R30[29] /UHPI_CNTL0 / UPP_CHA_CLOCK / GP6[11]
U17
I/O
CP[24]
C
uPP channel 1 clock
PRU0_R30[28] / UHPI_HCNTL1 / UPP_CHA_START / GP6[10]
W15
I/O
CP[24]
C
uPP channel 1 start
PRU0_R30[27] / UHPI_HHWIL / UPP_CHA_ENABLE / GP6[9]
U16
I/O
CP[24]
C
uPP channel 1 enable
PRU0_R30[26] /UHPI_HRW / UPP_CHA_WAIT / GP6[8] /
T15
I/O
CP[24]
C
uPP channel 1 wait
PRU1_R31[17]
(1)
I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.
Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the signal name
highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured
function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different
types (ie., input versus output), the table reflects the pin function direction for that particular peripheral.
(2)
IPD = Internal Pulldown resistor; IPU = Internal Pullup resistor; CP[n] = configurable pull-up/pull-down (where n is the pin group) using
the PUPDENA and PUPDSEL registers in the System Module. The pull-up and pull-down control of these pins is not active until the
device is out of reset. During reset, all of the pins associated with these registers are weakly pulled down. If the application requires a
pull-up, an external pull-up can be used.
(3)
This signal is part of a dual-voltage IO group (A, B or C). These groups can be operated at 3.3V or 1.8V nominal. The three groups can
be operated at independent voltages but all pins withina group will operate at the same voltage. Group A operates at the voltage of
power supply DVDD3318_A. Group B operates at the voltage of power supply DVDD3318_B. Group C operates at the voltage of power
supply DVDD3318_C.
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Device Overview
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