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74LVC2G241GD Datasheet(PDF) 9 Page - NXP Semiconductors |
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74LVC2G241GD Datasheet(HTML) 9 Page - NXP Semiconductors |
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9 / 18 page  74LVC2G241_9 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 09 — 10 June 2008 9 of 18 NXP Semiconductors 74LVC2G241 Dual buffer/line driver; 3-state Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 8. Enable and disable times for input 1OE mna730 tPLZ tPHZ outputs disabled outputs enabled VY VX outputs enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH 1OE input VOL VOH VCC VI VM GND GND tPZL tPZH VM VM Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 9. Enable and disable times for input 2OE mna731 tPLZ tPHZ outputs disabled outputs enabled VY VX outputs enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH 2OE input VOL VOH VCC VI VM GND GND tPZL tPZH VM VM |
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