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PA107DP Datasheet(PDF) 3 Page - Cirrus Logic |
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PA107DP Datasheet(HTML) 3 Page - Cirrus Logic |
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3 / 7 page ![]() PA107DP PA107DPU 3 P r o d u c t I n n o v a t i o n F r o m ® NOTES: 1. All Min/Max characteristics and specifications are guaranteed over the Specified Operating Condi- tions. Typical performance characteristics and specifications are derived from measurements taken at typical supply voltages and T C = 25°C. 2. Long term operation at the maximum junction temperature will result in reduced product life. Derate power dissipation to achieve high MTTF. 3. Doubles for every 10ºC of case temperature increase. 4. +V S and −VS denote the positive and negative supply voltages to the output stages. 5. +V AUX and –VAUX denote the positive and negative supply voltages to the input stages. 6. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz. Parameter Test Conditions Min Typ Max Units POWER SUPPLY VOLTAGE, +V S 20 100 V VOLTAGE, -V S -100 -20 V VOLTAGE, +V AUX 10 15 18 V VOLTAGE, -V AUX -18 -15 -10 V CURRENT, QUIESCENT, +V S 20 30 35 mA CURRENT, QUIESCENT, -V S 20 30 35 mA CURRENT, QUIESCENT, -V AUX 19 21 mA CURRENT, QUIESCENT, +V AUX 19 21 mA THERMAL RESISTANCE, AC, junction to case (Note 6) 1.5 °C/W RESISTANCE, DC junction to case 2 °C/W RESISTANCE, junction to air 30 °C/W TEMPERATURE RANGE, case -25 85 °C 1 2 3 4 5 6 7 8 9 10 11 12 C3 1uF C4 1uF +V SP C1-2 = 10uF/A out (peak), electrolytic/tantalum, low frequency bypass. C3-4 = 1uF 25V X7R ceramic capacitor recomended. C5-6 = 1uF 200V X7R ceramic capacitor recomended. + C5 1uF C6 1uF C1 C2 + IN -V S -V SP OUT +V S OPEN OPEN OPEN GND -V AUX +V AUX EXTERNAL CONNECTIONS 12-pin SIP Package Style DP Formed leads available See Package Style EE |
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