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MIC3263 Datasheet(PDF) 17 Page - Micrel Semiconductor |
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MIC3263 Datasheet(HTML) 17 Page - Micrel Semiconductor |
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17 / 32 page ![]() Micrel, Inc. MIC3263 VDD January 2010 17 M9999-012110 This is the output of the internal LDO regulator. Connect a c capacitor to this pin. e DRC input imming is a feature of the MIC3263 which better matches the sensitivity of the human eye compared to linear dimming. The DRC le version is s in T le 2 C Duty ycle P Dimming Ratio DR = 10 (N − 1) / 7 10μF cerami PWM Dimming The duty cycle of the PWM pulse applied to th is converted to 16 log levels. This logarithmic d unique duty-cyc . to DR duty-cycle con hown ab DR C WM (DR) N % % 0 0 0 1 6.25 1.0 2 12.5 1.4 3 18.75 1.9 4 25 2.7 5 31.25 3.7 6 37.5 5.2 7 43.75 7.2 8 50 10 9 56.25 14 10 19 62.5 11 68.75 27 12 75 37 13 81.25 52 14 87.5 72 15 93.75 100 Table 2. Dimming Ratio To avoid skipping between dimming levels, the uses Flicker-Free Dimming control. This techniq digital filter and hysteresis on the DRC pulse to clean DR output. The digital filter has a 0.1μF capacitor on the CINT pin to average the duty cycles of the PWM pulses. The averaged duty cycle has to be 4.16% higher than the nominal value before moving to the next dimming level as shown in Figure 7. Likewise, to move the previous dimming level the duty cycle has to be −4.16% lower than the nominal. To prevent flicker the duty-cycle hysteresis is set a 2%. MIC3263 ue uses a provide a Figure 7. Duty-Cycle Thresholds and Hysteresis PWM Dimming Limits The minimum pulse width of the PWM Dim is determined by the PWM Dimming frequency and the L and C used in the boost stages output filter. At low-PWM Dimming frequencies, higher dimming ratios can be achieved: TPWMD Dim Ratio = TLEDON Figure 8. PWM Dimming Ratio perceive light flicker at a 00Hz. At 100Hz the time PWM dimming minimum Consider that the human eye will PWM dimming frequency below 1 between pulses is 10μs. If the pulse width is 5μs, then: 10ms Dim Ratio = = 2000/1 5μs If high dimming ratios are required, a lower dimming frequency is required. During each DR pulse, the inductor current has to ramp up to it steady state value to generate the necessary boost output voltage in order for the full programmed LED current to flow in the LED channels. The smaller the inductance value the faster this time is and a narrower PWM dimming pulse can be achieved. But smaller inductance means higher ripple current. |
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