| Electronic Components Datasheet Search |
|
STM8S105C4B3C Datasheet(PDF) 98 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM8S105C4B3C Datasheet(HTML) 98 Page - STMicroelectronics |
|
98 / 127 page ![]() Figure 44: Typical application with I 2C bus and timing diagram (1) ai15385 S TART SDA I²C bus VDD VDD STM8S105xx SDA SCL tf(SDA) tr(SDA) SCL th(STA) tw(SCKH) tw(SCKL) tsu(SDA) tr(SCK) tf(SCK) th(SDA) S TART REPEATED S TART tsu(STA) tsu(STO) S TOP tsu(STA:STO) 1. Measurement points are made at CMOS levels: 0.3 x VDD and 0.7 x VDD 10-bit ADC characteristics 10.3.11 Subject to general operating conditions for VDDA, fMASTER, and TA unless otherwise specified. Table 45: ADC characteristics Unit Max Typ Min Conditions Parameter Symbol MHz 4 1 VDDA =2.95 to 5.5 V ADC clock frequency fADC 6 1 VDDA =4.5 to 5.5 V V 5.5 3 Analog supply VDDA V VDDA 2.75 (1) Positive reference voltage VREF+ V 0.5 (1) V SSA Negative reference voltage VREF- V V DDA V SSA Conversion voltage range (2) VAIN V VREF+ VREF- Devices with external VREF+/VREF- pins pF 3 Internal sample and hold capacitor CADC DocID14771 Rev 9 98/127 STM8S105xx Electrical characteristics |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |