PIC16F1824-ESLASHML datasheet(124/420 Pages) MICROCHIP

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PIC16F/LF1824/1828

DS41419A-page 124

Preliminary

 2010 Microchip Technology Inc.

12.2

PORTA Registers

PORTA is a 6-bit wide, bidirectional port. The

corresponding data direction register is TRISA

(Register 12-4). Setting a TRISA bit (= 1) will make the

corresponding PORTA pin an input (i.e., disable the

output driver). Clearing a TRISA bit (= 0) will make the

corresponding PORTA pin an output (i.e., enables

output driver and puts the contents of the output latch

on the selected pin). The exception is RA3, which is

input only and its TRIS bit will always read as ‘1’.

Example 12-1 shows how to initialize PORTA.

Reading the PORTA register (Register 12-3) reads the

status of the pins, whereas writing to it will write to the

PORT latch. All write operations are read-modify-write

operations. Therefore, a write to a port implies that the

port pins are read, this value is modified and then

written to the PORT data latch (LATA).

The TRISA register (Register 12-4) controls the

PORTA pin output drivers, even when they are being

used as analog inputs. The user should ensure the bits

in the TRISA register are maintained set when using

them as analog inputs. I/O pins configured as analog

input always read ‘0’.

The INLVLA register (Register 12-8) controls the input

voltage threshold for each of the available PORTA input

pins. A selection between the Schmitt Trigger CMOS or

the TTL Compatible thresholds is available. The input

threshold is important in determining the value of a

read of the PORTA register and also the level at which

an Interrupt-on-Change occurs, if that feature is

enabled. See Section 29.4 “DC Characteristics:

PIC16F/LF1824/1828-I/E” for more information on

threshold levels.

12.2.1

WEAK PULL-UPS

Each of the PORTA pins has an individually configurable

internal weak pull-up. Control bits WPUA<5:0> enable or

disable each pull-up (see Register 12-7). Each weak

pull-up is automatically turned off when the port pin is

configured as an output. All pull-ups are disabled on a

Power-on Reset by the WPUEN bit of the OPTION

12.2.2

ANSELA REGISTER

The ANSELA register (Register 12-6) is used to

configure the Input mode of an I/O pin to analog.

Setting the appropriate ANSELA bit high will cause all

digital reads on the pin to be read as ‘0’ and allow

analog functions on the pin to operate correctly.

The state of the ANSELA bits has no affect on digital

output functions. A pin with TRIS clear and ANSEL set

will still operate as a digital output, but the Input mode

will be analog. This can cause unexpected behavior

when executing read-modify-write instructions on the

affected port.

EXAMPLE 12-1:

INITIALIZING PORTA

Note:

Changing the input threshold selection

should be performed while all peripheral

modules are disabled. Changing the

threshold level during the time a module is

active may inadvertently generate a tran-

sition associated with an input pin, regard-

less of the actual voltage level on that pin.

Note:

The ANSELA register must be initialized to

configure an analog channel as a digital

input. Pins configured as analog inputs will

read ‘0’.

BANKSEL PORTA

;

CLRF

PORTA

;Init PORTA

BANKSEL LATA

;Data Latch

CLRF

LATA

;

BANKSEL ANSELA

;

CLRF

ANSELA

;digital I/O

BANKSEL TRISA

;

MOVLW

B'00111000' ;Set RA<5:3> as inputs

MOVWF

TRISA

;and set RA<2:0> as

;outputs

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