PIC16F1824-ESLASHML datasheet(128/420 Pages) MICROCHIP

128 / 420 page

PIC16F/LF1824/1828

DS41419A-page 128

Preliminary

 2010 Microchip Technology Inc.

WPUA: WEAK PULL-UP PORTA REGISTER

U-0

R/W-1/1

—

WPUA5

WPUA4

WPUA3

WPUA2

WPUA1

WPUA0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

u = Bit is unchanged

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set

‘0’ = Bit is cleared

bit 7-6

Unimplemented: Read as ‘0’

bit 5-0

WPUA<5:0>: Weak Pull-up Register bits

1 = Pull-up enabled

0 = Pull-up disabled

Note 1:

Global WPUEN bit of the OPTION register must be cleared for individual pull-ups to be enabled.

The weak pull-up device is automatically disabled if the pin is in configured as an output.

INLVLA: PORTA INPUT LEVEL CONTROL REGISTER

U-0

R/W-0/0

R/W-1/1

R/W-0/0

—

INLVLA5

INLVLA4

INLVLA3

INLVLA2

INLVLA1

INLVLA0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

u = Bit is unchanged

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set

‘0’ = Bit is cleared

bit 7-6

Unimplemented: Read as ‘0

bit 5-0

INLVLA<5:0>: PORTA Input Level Select bits

For RA<5:0> pins, respectively

1 = ST input used for PORT reads and interrupt-on-change

0 = TTL input used for PORT reads and interrupt-on-change

PIC16F1824-E/ML Datasheet(PDF) 128 Page - Microchip Technology

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