PIC16F722-ESLASHML datasheet(100/302 Pages) MICROCHIP

100 / 302 page

PIC16F72X/PIC16LF72X

DS41341E-page 100

9.1

ADC Configuration

When configuring and using the ADC the following

functions must be considered:

• Port configuration

• Channel selection

• ADC voltage reference selection

• ADC conversion clock source

• Interrupt control

• Results formatting

9.1.1

PORT CONFIGURATION

The ADC can be used to convert both analog and

digital signals. When converting analog signals, the I/O

pin should be configured for analog by setting the

associated TRIS and ANSEL bits. Refer to Section 6.0

“I/O Ports” for more information.

9.1.2

CHANNEL SELECTION

The CHS bits of the ADCON0 register determine which

channel is connected to the sample and hold circuit.

When changing channels, a delay is required before

starting the next conversion. Refer to Section 9.2

“ADC Operation” for more information.

9.1.3

ADC VOLTAGE REFERENCE

The ADREF bits of the ADCON1 register provides

control of the positive voltage reference. The positive

voltage reference can be either VDD, an external

voltage source or the internal Fixed Voltage Reference.

The negative voltage reference is always connected to

the ground reference. See Section 10.0 “Fixed

Voltage Reference” for more details on the Fixed

Voltage Reference.

9.1.4

CONVERSION CLOCK

The source of the conversion clock is software select-

able via the ADCS bits of the ADCON1 register. There

are seven possible clock options:

•FOSC/2

•FOSC/4

•FOSC/8

•FOSC/16

•FOSC/32

•FOSC/64

•FRC (dedicated internal oscillator)

The time to complete one bit conversion is defined as

TAD. One full 8-bit conversion requires 10 TAD periods

as shown in Figure 9-2.

For correct conversion, the appropriate TAD specifica-

tion must be met. Refer to the A/D conversion require-

ments in Section 23.0 “Electrical Specifications” for

more information. Table 9-1 gives examples of appro-

priate ADC clock selections.

Note:

Analog voltages on any pin that is defined

as a digital input may cause the input

buffer to conduct excess current.

Note:

Unless using the FRC, any changes in the

system clock frequency will change the

ADC

clock

frequency,

which

may

adversely affect the ADC result.

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