PIC24F16KA102-ISLASHML datasheet(45/254 Pages) MICROCHIP

45 / 254 page

Preliminary

DS39927B-page 43

PIC24F16KA102 FAMILY

5.0

FLASH PROGRAM MEMORY

The PIC24F16KA102 family of devices contains

internal Flash program memory for storing and

executing application code. The memory is readable,

writable and erasable when operating with VDD over

1.8V.

Flash memory can be programmed in three ways:

• In-Circuit Serial Programming™ (ICSP™)

• Run-Time Self Programming (RTSP)

• Enhanced In-Circuit Serial Programming

(Enhanced ICSP)

ICSP allows a PIC24F16KA102 device to be serially

programmed while in the end application circuit. This is

simply done with two lines for the programming clock

and programming data (which are named PGCx and

PGDx, respectively), and three other lines for power

(VDD), ground (VSS) and Master Clear/Program Mode

Entry Voltage (MCLR/VPP). This allows customers to

manufacture boards with unprogrammed devices and

then program the microcontroller just before shipping

the product. This also allows the most recent firmware

or custom firmware to be programmed.

Real-Time Streaming Protocol (RTSP) is accomplished

using TBLRD (table read) and TBLWT (table write)

instructions. With RTSP, the user may write program

memory data in blocks of 32 instructions (96 bytes) at

a time, and erase program memory in blocks of 32, 64

and 128 instructions (96,192 and 384 bytes) at a time.

The NVMOP<1:0> (NVMCON<1:0>) bits decide the

erase block size.

5.1

Table Instructions and Flash

Programming

Regardless of the method used, Flash memory

programming is done with the table read and write

instructions. These allow direct read and write access to

the program memory space from the data memory while

the device is in normal operating mode. The 24-bit target

address in the program memory is formed using the

TBLPAG<7:0> bits and the Effective Address (EA) from

a W register, specified in the table instruction, as

depicted in Figure 5-1.

The TBLRDL and the TBLWTL instructions are used to

read or write to bits<15:0> of program memory.

TBLRDL

and TBLWTL can access program memory in

both Word and Byte modes.

The TBLRDH and TBLWTH instructions are used to read

or write to bits<23:16> of program memory. TBLRDH

and TBLWTH can also access program memory in Word

or Byte mode.

FIGURE 5-1:

ADDRESSING FOR TABLE REGISTERS

Note:

This data sheet summarizes the features

of this group of PIC24F devices. It is not

intended to be a comprehensive reference

source. For more information on Flash

programming, refer to the “PIC24F Family

Reference Manual”

, Section 4. “Program

Memory”

(DS39715).

Program Counter

24 Bits

Program

TBLPAG Reg

8 Bits

Working Reg EA

16 Bits

Using

Byte

24-Bit EA

1/0

Select

Table

Instruction

Counter

Using

User/Configuration

Space Select

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