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ST72324J2 Datasheet(PDF) 160 Page - STMicroelectronics

Part # ST72324J2
Description  5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH,10-BIT ADC, 4 TIMERS,SPI,SCI INTERFACE
PDF  164 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72324J2 Datasheet(HTML) 160 Page - STMicroelectronics

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KNOWN LIMITATIONS (Cont’d)
To avoid this, a semaphore is set to '1' before
checking the level change. The semaphore is
changed to level '0' inside the interrupt routine.
When a level change is detected, the semaphore
status is checked and if it is '1' this means that the
last interrupt has been missed. In this case, the in-
terrupt routine is invoked with the call instruction.
There is another possible case, that is, if writing to
PxOR or PxDDR is done with global interrupts dis-
abled (interrupt mask bit set). In this case, the
semaphore is changed to '1' when the level
change is detected. Detecting a missed interrupt is
done after the global interrupts are enabled (inter-
rupt mask bit reset) and by checking the status of
the semaphore. If it is '1' this means that the last
interrupt was missed and the interrupt routine is in-
voked with the call instruction.
To implement the workaround, the following soft-
ware sequence is to be followed for writing into the
PxOR/PxDDR registers. The example is for Port
PF1 with falling edge interrupt sensitivity. The soft-
ware sequence is given for both cases (global in-
terrupt disabled/enabled).
Case 1: Writing to PxOR or PxDDR with Global In-
terrupts Enabled:
LD A,#01
LD sema,A
; set the semaphore to '1'
LD A,PFDR
AND A,#02
LD X,A
; store the level before writing to
PxOR/PxDDR
LD A,#$90
LD PFDDR,A ; Write to PFDDR
LD A,#$ff
LD PFOR,A
; Write to PFOR
LD A,PFDR
AND A,#02
LD Y,A
; store the level after writing to
PxOR/PxDDR
LD A,X
; check for falling edge
cp A,#02
jrne OUT
TNZ Y
jrne OUT
LD A,sema
; check the semaphore status if
edge is detected
CP A,#01
jrne OUT
call call_routine; call the interrupt routine
OUT:LD A,#00
LD sema,A
.call_routine
; entry to call_routine
PUSH A
PUSH X
PUSH CC
.ext1_rt
; entry to interrupt routine
LD A,#00
LD sema,A
IRET
Case 2: Writing to PxOR or PxDDR with Global In-
terrupts Disabled:
SIM
; set the interrupt mask
LD A,PFDR
AND A,#$02
LD X,A
; store the level before writing to
PxOR/PxDDR
LD A,#$90
LD PFDDR,A ; Write into PFDDR
LD A,#$ff
LD PFOR,A
; Write to PFOR
LD A,PFDR
AND A,#$02
LD Y,A
; store the level after writing to
PxOR/PxDDR
LD A,X
; check for falling edge
cp A,#$02
jrne OUT
TNZ Y
jrne OUT
LD A,#$01
LD sema,A
; set the semaphore to '1' if edge is
detected
RIM
; reset the interrupt mask
LD A,sema
; check the semaphore status
CP A,#$01
jrne OUT
call call_routine; call the interrupt routine
RIM
OUT:
RIM
1



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